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![]() Add the clock-frequency property to the cb_intosc_ls_clk and cb_intosc_hs_div2_clk device tree nodes. The f2s_free_clk is implemented by custom logic in the FPGA; so it should be disabled in the dtsi by default and enabled by a dts for a specific FPGA design on a specific board. Signed-off-by: Matthew Gerlach <matthew.gerlach@altera.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> |
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.. | ||
Makefile | ||
socfpga_stratix10.dtsi | ||
socfpga_stratix10_socdk.dts | ||
socfpga_stratix10_socdk_nand.dts | ||
socfpga_stratix10_swvp.dts |