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490a6291b1
If CONFIG_HIGHMEM=y, two reserved blocks are allocated on R-Car Gen2:
cma: Reserved 256 MiB at 0x70000000 on node -1
cma: Reserved 64 MiB at 0x6c000000 on node -1
The first block is reserved by the family-specific rcar_gen2_reserve(),
the second by the common arm_memblock_init() (shmobile_defconfig sets
CONFIG_CMA_SIZE_MBYTES=64). As both blocks are reserved (eventually)
using dma_contiguous_reserve_area(), they both have the same name
("reserved"). Hence if CONFIG_CMA_SYSFS=y:
sysfs: cannot create duplicate filename '/kernel/mm/cma/reserved'
...
cma_sysfs_init from do_one_initcall+0x84/0x178
...
kobject: kobject_add_internal failed for reserved with -EEXIST, don't try to register things with the same name in the same directory.
This causes cma_sysfs_init() to fail completely, and not to create
/sys/kernel/mm/cma/ at all.
Fix this by dropping the R-Car Gen2-specific reservation. Compared to
when it was introduced, now there exist more flexible mechanisms to
control the size of memory reserved for CMA. Users can reserve more
memory by increasing CONFIG_CMA_SIZE_MBYTES, passing the cma=<N> kernel
command line parameter, or adding a reserved-memory/linux,cma node to
DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/3d38f4fec20c4af46e4570012de7017eee9a39e9.1736249109.git.geert+renesas@glider.be
149 lines
3.9 KiB
C
149 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* R-Car Generation 2 support
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Magnus Damm
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* Copyright (C) 2014 Ulrich Hecht
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*/
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#include <linux/clocksource.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/memblock.h>
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#include <linux/of.h>
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#include <linux/of_clk.h>
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#include <linux/psci.h>
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#include <asm/mach/arch.h>
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#include <asm/secure_cntvoff.h>
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#include "common.h"
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static const struct of_device_id cpg_matches[] __initconst = {
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{ .compatible = "renesas,r8a7742-cpg-mssr", .data = "extal" },
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{ .compatible = "renesas,r8a7743-cpg-mssr", .data = "extal" },
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{ .compatible = "renesas,r8a7744-cpg-mssr", .data = "extal" },
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{ .compatible = "renesas,r8a7790-cpg-mssr", .data = "extal" },
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{ .compatible = "renesas,r8a7791-cpg-mssr", .data = "extal" },
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{ .compatible = "renesas,r8a7793-cpg-mssr", .data = "extal" },
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{ /* sentinel */ }
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};
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static unsigned int __init get_extal_freq(void)
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{
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const struct of_device_id *match;
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struct device_node *cpg, *extal;
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u32 freq = 20000000;
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int idx = 0;
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cpg = of_find_matching_node_and_match(NULL, cpg_matches, &match);
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if (!cpg)
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return freq;
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if (match->data)
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idx = of_property_match_string(cpg, "clock-names", match->data);
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extal = of_parse_phandle(cpg, "clocks", idx);
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of_node_put(cpg);
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if (!extal)
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return freq;
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of_property_read_u32(extal, "clock-frequency", &freq);
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of_node_put(extal);
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return freq;
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}
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#define CNTCR 0
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#define CNTFID0 0x20
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static void __init rcar_gen2_timer_init(void)
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{
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bool need_update = true;
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void __iomem *base;
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u32 freq;
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/*
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* If PSCI is available then most likely we are running on PSCI-enabled
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* U-Boot which, we assume, has already taken care of resetting CNTVOFF
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* and updating counter module before switching to non-secure mode
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* and we don't need to.
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*/
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#ifdef CONFIG_ARM_PSCI_FW
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if (psci_ops.cpu_on)
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need_update = false;
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#endif
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if (need_update == false)
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goto skip_update;
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secure_cntvoff_init();
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if (of_machine_is_compatible("renesas,r8a7745") ||
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of_machine_is_compatible("renesas,r8a77470") ||
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of_machine_is_compatible("renesas,r8a7792") ||
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of_machine_is_compatible("renesas,r8a7794")) {
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freq = 260000000 / 8; /* ZS / 8 */
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} else {
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/* At Linux boot time the r8a7790 arch timer comes up
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* with the counter disabled. Moreover, it may also report
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* a potentially incorrect fixed 13 MHz frequency. To be
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* correct these registers need to be updated to use the
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* frequency EXTAL / 2.
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*/
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freq = get_extal_freq() / 2;
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}
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/* Remap "armgcnt address map" space */
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base = ioremap(0xe6080000, PAGE_SIZE);
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/*
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* Update the timer if it is either not running, or is not at the
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* right frequency. The timer is only configurable in secure mode
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* so this avoids an abort if the loader started the timer and
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* entered the kernel in non-secure mode.
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*/
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if ((ioread32(base + CNTCR) & 1) == 0 ||
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ioread32(base + CNTFID0) != freq) {
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/* Update registers with correct frequency */
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iowrite32(freq, base + CNTFID0);
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asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
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/* make sure arch timer is started by setting bit 0 of CNTCR */
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iowrite32(1, base + CNTCR);
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}
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iounmap(base);
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skip_update:
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of_clk_init(NULL);
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timer_probe();
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}
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static const char * const rcar_gen2_boards_compat_dt[] __initconst = {
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"renesas,r8a7790",
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"renesas,r8a7791",
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"renesas,r8a7792",
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"renesas,r8a7793",
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"renesas,r8a7794",
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NULL
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};
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DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)")
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.init_late = shmobile_init_late,
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.init_time = rcar_gen2_timer_init,
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.dt_compat = rcar_gen2_boards_compat_dt,
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MACHINE_END
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static const char * const rz_g1_boards_compat_dt[] __initconst = {
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"renesas,r8a7742",
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"renesas,r8a7743",
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"renesas,r8a7744",
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"renesas,r8a7745",
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"renesas,r8a77470",
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NULL
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};
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DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)")
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.init_late = shmobile_init_late,
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.init_time = rcar_gen2_timer_init,
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.dt_compat = rz_g1_boards_compat_dt,
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MACHINE_END
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