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8bd10f0024
New clocks are saved to enable ULP0/ULP1 for SAMA7D65 because this SoC has a total of 9 main clocks that need to be saved for ULP0/ULP1 mode. Add mcks member to at91_pm_data, this will be used to determine how many main clocks need to be saved. In the pm_mcks variable will also make sure that no unnecessary clock settings are written during mck_ps_restore. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/2ac0832f6ede17a5c111ede09b44b8a126e33e36.1740671156.git.Ryan.Wanner@microchip.com [claudiu.beznea: adjusted the entry in pmc_infos[] array] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
25 lines
898 B
C
25 lines
898 B
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/stddef.h>
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#include <linux/kbuild.h>
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#include "pm.h"
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int main(void)
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{
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DEFINE(PM_DATA_PMC, offsetof(struct at91_pm_data, pmc));
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DEFINE(PM_DATA_RAMC0, offsetof(struct at91_pm_data, ramc[0]));
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DEFINE(PM_DATA_RAMC1, offsetof(struct at91_pm_data, ramc[1]));
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DEFINE(PM_DATA_RAMC_PHY, offsetof(struct at91_pm_data,
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ramc_phy));
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DEFINE(PM_DATA_MEMCTRL, offsetof(struct at91_pm_data, memctrl));
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DEFINE(PM_DATA_MODE, offsetof(struct at91_pm_data, mode));
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DEFINE(PM_DATA_SHDWC, offsetof(struct at91_pm_data, shdwc));
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DEFINE(PM_DATA_SFRBU, offsetof(struct at91_pm_data, sfrbu));
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DEFINE(PM_DATA_PMC_MCKR_OFFSET, offsetof(struct at91_pm_data,
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pmc_mckr_offset));
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DEFINE(PM_DATA_PMC_VERSION, offsetof(struct at91_pm_data,
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pmc_version));
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DEFINE(PM_DATA_PMC_MCKS, offsetof(struct at91_pm_data,
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pmc_mcks));
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return 0;
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}
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