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8bd10f0024
New clocks are saved to enable ULP0/ULP1 for SAMA7D65 because this SoC has a total of 9 main clocks that need to be saved for ULP0/ULP1 mode. Add mcks member to at91_pm_data, this will be used to determine how many main clocks need to be saved. In the pm_mcks variable will also make sure that no unnecessary clock settings are written during mck_ps_restore. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/2ac0832f6ede17a5c111ede09b44b8a126e33e36.1740671156.git.Ryan.Wanner@microchip.com [claudiu.beznea: adjusted the entry in pmc_infos[] array] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
46 lines
1,011 B
C
46 lines
1,011 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* AT91 Power Management
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*
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* Copyright (C) 2005 David Brownell
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*/
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#ifndef __ARCH_ARM_MACH_AT91_PM
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#define __ARCH_ARM_MACH_AT91_PM
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#include <asm/proc-fns.h>
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#include <linux/mfd/syscon/atmel-mc.h>
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#include <soc/at91/at91sam9_ddrsdr.h>
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#include <soc/at91/at91sam9_sdramc.h>
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#include <soc/at91/sama7-ddr.h>
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#include <soc/at91/sama7-sfrbu.h>
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#define AT91_MEMCTRL_MC 0
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#define AT91_MEMCTRL_SDRAMC 1
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#define AT91_MEMCTRL_DDRSDR 2
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#define AT91_PM_STANDBY 0x00
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#define AT91_PM_ULP0 0x01
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#define AT91_PM_ULP0_FAST 0x02
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#define AT91_PM_ULP1 0x03
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#define AT91_PM_BACKUP 0x04
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#ifndef __ASSEMBLY__
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struct at91_pm_data {
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void __iomem *pmc;
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void __iomem *ramc[2];
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void __iomem *ramc_phy;
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unsigned long uhp_udp_mask;
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unsigned int memctrl;
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unsigned int mode;
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void __iomem *shdwc;
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void __iomem *sfrbu;
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unsigned int standby_mode;
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unsigned int suspend_mode;
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unsigned int pmc_mckr_offset;
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unsigned int pmc_version;
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unsigned int pmc_mcks;
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};
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#endif
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#endif
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