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c3d944a367
Without this, the vectors are removed if LD_DEAD_CODE_DATA_ELIMINATION
is enabled. At startup, the CPU (silently) hangs in the undefined
instruction exception as soon as the first timer interrupt arrives.
On my setup, the system also boots fine without the 2nd and 3rd KEEP()
statements, so I cannot tell whether these are actually required.
[nathan: Use OVERLAY_KEEP() to avoid breaking old ld.lld versions]
Cc: stable@vger.kernel.org
Fixes: ed0f941022 ("ARM: 9404/1: arm32: enable HAVE_LD_DEAD_CODE_DATA_ELIMINATION")
Signed-off-by: Christian Eggers <ceggers@arri.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
177 lines
4.5 KiB
C
177 lines
4.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#include <asm-generic/vmlinux.lds.h>
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#ifdef CONFIG_HOTPLUG_CPU
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#define ARM_CPU_DISCARD(x)
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#define ARM_CPU_KEEP(x) x
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#else
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#define ARM_CPU_DISCARD(x) x
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#define ARM_CPU_KEEP(x)
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#endif
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#if (defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK)) || \
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defined(CONFIG_GENERIC_BUG) || defined(CONFIG_JUMP_LABEL)
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#define ARM_EXIT_KEEP(x) x
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#define ARM_EXIT_DISCARD(x)
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#else
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#define ARM_EXIT_KEEP(x)
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#define ARM_EXIT_DISCARD(x) x
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#endif
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#ifdef CONFIG_MMU
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#define ARM_MMU_KEEP(x) KEEP(x)
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#define ARM_MMU_DISCARD(x)
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#else
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#define ARM_MMU_KEEP(x)
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#define ARM_MMU_DISCARD(x) x
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#endif
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/*
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* ld.lld does not support NOCROSSREFS:
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* https://github.com/ClangBuiltLinux/linux/issues/1609
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*/
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#ifdef CONFIG_LD_IS_LLD
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#define NOCROSSREFS
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#endif
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#ifdef CONFIG_LD_CAN_USE_KEEP_IN_OVERLAY
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#define OVERLAY_KEEP(x) KEEP(x)
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#else
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#define OVERLAY_KEEP(x) x
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#endif
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/* Set start/end symbol names to the LMA for the section */
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#define ARM_LMA(sym, section) \
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sym##_start = LOADADDR(section); \
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sym##_end = LOADADDR(section) + SIZEOF(section)
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#define PROC_INFO \
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. = ALIGN(4); \
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__proc_info_begin = .; \
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KEEP(*(.proc.info.init)) \
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__proc_info_end = .;
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#define IDMAP_TEXT \
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ALIGN_FUNCTION(); \
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__idmap_text_start = .; \
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*(.idmap.text) \
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__idmap_text_end = .; \
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#define ARM_DISCARD \
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*(.ARM.exidx.exit.text) \
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*(.ARM.extab.exit.text) \
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*(.ARM.exidx.text.exit) \
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*(.ARM.extab.text.exit) \
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ARM_CPU_DISCARD(*(.ARM.exidx.cpuexit.text)) \
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ARM_CPU_DISCARD(*(.ARM.extab.cpuexit.text)) \
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ARM_EXIT_DISCARD(EXIT_TEXT) \
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ARM_EXIT_DISCARD(EXIT_DATA) \
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EXIT_CALL \
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ARM_MMU_DISCARD(*(.text.fixup)) \
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ARM_MMU_DISCARD(*(__ex_table)) \
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COMMON_DISCARDS
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/*
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* Sections that should stay zero sized, which is safer to explicitly
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* check instead of blindly discarding.
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*/
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#define ARM_ASSERTS \
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.plt : { \
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*(.iplt) *(.rel.iplt) *(.iplt) *(.igot.plt) \
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} \
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ASSERT(SIZEOF(.plt) == 0, \
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"Unexpected run-time procedure linkages detected!")
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#define ARM_DETAILS \
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ELF_DETAILS \
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.ARM.attributes 0 : { *(.ARM.attributes) }
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#define ARM_STUBS_TEXT \
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*(.gnu.warning) \
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*(.glue_7) \
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*(.glue_7t) \
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*(.vfp11_veneer) \
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*(.v4_bx)
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#define ARM_TEXT \
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IDMAP_TEXT \
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__entry_text_start = .; \
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*(.entry.text) \
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__entry_text_end = .; \
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IRQENTRY_TEXT \
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SOFTIRQENTRY_TEXT \
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TEXT_TEXT \
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SCHED_TEXT \
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LOCK_TEXT \
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KPROBES_TEXT \
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ARM_STUBS_TEXT \
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. = ALIGN(4); \
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*(.got) /* Global offset table */ \
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ARM_CPU_KEEP(PROC_INFO)
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/* Stack unwinding tables */
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#define ARM_UNWIND_SECTIONS \
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. = ALIGN(8); \
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.ARM.unwind_idx : { \
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__start_unwind_idx = .; \
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*(.ARM.exidx*) \
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__stop_unwind_idx = .; \
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} \
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.ARM.unwind_tab : { \
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__start_unwind_tab = .; \
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*(.ARM.extab*) \
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__stop_unwind_tab = .; \
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}
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/*
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* The vectors and stubs are relocatable code, and the
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* only thing that matters is their relative offsets
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*/
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#define ARM_VECTORS \
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__vectors_lma = .; \
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OVERLAY 0xffff0000 : NOCROSSREFS AT(__vectors_lma) { \
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.vectors { \
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OVERLAY_KEEP(*(.vectors)) \
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} \
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.vectors.bhb.loop8 { \
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OVERLAY_KEEP(*(.vectors.bhb.loop8)) \
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} \
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.vectors.bhb.bpiall { \
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OVERLAY_KEEP(*(.vectors.bhb.bpiall)) \
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} \
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} \
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ARM_LMA(__vectors, .vectors); \
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ARM_LMA(__vectors_bhb_loop8, .vectors.bhb.loop8); \
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ARM_LMA(__vectors_bhb_bpiall, .vectors.bhb.bpiall); \
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. = __vectors_lma + SIZEOF(.vectors) + \
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SIZEOF(.vectors.bhb.loop8) + \
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SIZEOF(.vectors.bhb.bpiall); \
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\
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__stubs_lma = .; \
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.stubs ADDR(.vectors) + 0x1000 : AT(__stubs_lma) { \
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*(.stubs) \
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} \
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ARM_LMA(__stubs, .stubs); \
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. = __stubs_lma + SIZEOF(.stubs); \
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\
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PROVIDE(vector_fiq_offset = vector_fiq - ADDR(.vectors));
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#define ARM_TCM \
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__itcm_start = ALIGN(4); \
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.text_itcm ITCM_OFFSET : AT(__itcm_start - LOAD_OFFSET) { \
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__sitcm_text = .; \
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*(.tcm.text) \
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*(.tcm.rodata) \
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. = ALIGN(4); \
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__eitcm_text = .; \
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} \
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. = __itcm_start + SIZEOF(.text_itcm); \
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\
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__dtcm_start = .; \
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.data_dtcm DTCM_OFFSET : AT(__dtcm_start - LOAD_OFFSET) { \
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__sdtcm_data = .; \
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*(.tcm.data) \
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. = ALIGN(4); \
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__edtcm_data = .; \
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} \
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. = __dtcm_start + SIZEOF(.data_dtcm);
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