public-mirrors/linux
1
0
Fork 0
mirror of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2025-08-05 16:54:27 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions
linux/arch/arm/boot/dts/xilinx
History
Exact
Michal Simek 6fd90200aa ARM: zynq: Do not define address/size-cells for nand-controller 
There is no reason to define address/size-cells without defining child
nodes in zynq-7000.dtsi. Define it in board file instead.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7a3b9eb256b90ea19d35f8bbe3fd311890767974.1736233292.git.michal.simek@amd.com
2025-02-04 09:32:09 +01:00
..
Makefile
zynq-7000.dtsi ARM: zynq: Do not define address/size-cells for nand-controller 2025-02-04 09:32:09 +01:00
zynq-cc108.dts ARM: zynq: Enable QSPIs on platforms 2025-02-03 17:05:50 +01:00
zynq-ebaz4205.dts ARM: zynq: Do not define address/size-cells for nand-controller 2025-02-04 09:32:09 +01:00
zynq-microzed.dts ARM: zynq: Remove ethernet0 alias from Microzed 2025-02-03 17:05:51 +01:00
zynq-parallella.dts ARM: zynq: Remove deprecated device_type property 2025-02-03 17:05:50 +01:00
zynq-zc702.dts ARM: zynq: Enable QSPIs on platforms 2025-02-03 17:05:50 +01:00
zynq-zc706.dts ARM: zynq: Enable QSPIs on platforms 2025-02-03 17:05:50 +01:00
zynq-zc770-xm010.dts ARM: zynq: Enable QSPIs on platforms 2025-02-03 17:05:50 +01:00
zynq-zc770-xm011.dts ARM: zynq: Wire smcc with nand/nor memories on zc770 platform 2025-02-03 17:05:50 +01:00
zynq-zc770-xm012.dts ARM: zynq: Wire smcc with nand/nor memories on zc770 platform 2025-02-03 17:05:50 +01:00
zynq-zc770-xm013.dts ARM: zynq: Enable QSPIs on platforms 2025-02-03 17:05:50 +01:00
zynq-zed.dts ARM: zynq: Enable QSPIs on platforms 2025-02-03 17:05:50 +01:00
zynq-zturn-common.dtsi ARM: zynq: Enable QSPIs on platforms 2025-02-03 17:05:50 +01:00
zynq-zturn-v5.dts
zynq-zturn.dts
zynq-zybo-z7.dts ARM: zynq: Add sdhci to alias node 2025-02-03 17:05:51 +01:00
zynq-zybo.dts ARM: zynq: Enable QSPIs on platforms 2025-02-03 17:05:50 +01:00