mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-08-05 16:54:27 +00:00
ab2e0f4f6c
This commit creates new file to manage security features and supported OPP
on STM32MP15xF SOCs. On STM32MP15xY, "Y" gives information:
-Y = A means no cryp IP and no secure boot + A7-CPU@650MHz.
-Y = C means cryp IP + optee + secure boot + A7-CPU@650MHz.
-Y = D means no cryp IP and no secure boot + A7-CPU@800MHz.
-Y = F means cryp IP + optee + secure boot + A7-CPU@800MHz.
It fullfills the initial STM32MP15x SoC diversity introduced by
commit 0eda69b6c5 ("ARM: dts: stm32: Manage security diversity
for STM32M15x SOCs").
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-1-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
17 lines
475 B
Text
17 lines
475 B
Text
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
|
|
/*
|
|
* Copyright (C) STMicroelectronics 2025 - All Rights Reserved
|
|
* Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
|
|
*/
|
|
|
|
&etzpc {
|
|
cryp1: cryp@54001000 {
|
|
compatible = "st,stm32mp1-cryp";
|
|
reg = <0x54001000 0x400>;
|
|
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&rcc CRYP1>;
|
|
resets = <&rcc CRYP1_R>;
|
|
access-controllers = <&etzpc 9>;
|
|
status = "disabled";
|
|
};
|
|
};
|