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07a3c038bd
SiFive: Add support for the Eswin EIC7700 SoC, which needs to make sure of the non-standard cache-ops provided by the ccache driver. Bindings: Conversions for two Marvell bindings to yaml, and additions of two soc-specific compatibles to the axm45mp bindings. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCaCcVygAKCRB4tDGHoIJi 0r+WAQC7hLWCbsKAMWSLCVeEzzMidEx6Ajbqn495qmOP9g4p0gD/dRw4QpdB178M PejLo1wchve/Yl9bxsPZ38OZ0fxzNQU= =OAOU -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmguQj4ACgkQmmx57+YA GNl5YhAAvTyEtWzuVitS/xtD8rbhQP/WoEn4P70KIg6L0Uy2Cx/wa5sjtlY1+S3E NQltSKrgB/n4oSwSRSBUR2+N+T7JKfdBT3dTEvJqZE2UZMvp8a4MeFPrNkeh756R Za0Ixh6itTCflfL1mQJOAECBmCFwszBGMKBTe7WInA9UorXYkFMuKULleAjcW2I3 PTPzMGwQ9Lx3no86mEMYvr2TbBV1/KFV6BPhKynll3l3k3SmXraHhaC6E7GFTv86 gzAwziXeq7sv7vbcH08pqFbHlqRPuChD11KUGdJ4PBVwt79zU+GwdA79B14GPet/ 8noOwrGPvzg2OxaoYxfaxheiUbVF3pvzPzXa2RDu88kXW/CBmBsTrJv+KpPBN8gh Mxnx7xvOnqJs3MoIOm/+RgX6V7H3/QyFbKOINCnxnuvbBI8PXiG1h/pAFzAaK8V2 LdiLJjDbmBPem4ZpLA6wRvlmpoIoaJjmlbqWpwpMwIAjEfdGrgssQUGQEJoaifhi E7hzf28342TjD20mB8nL3W7adjC/kiFzuYQG8vSoMPLKhOVyHRlSMRLkUWc2u5Nk 9mQLfVCyAd9pbqCiIe5AZL8hC+RDtitd6fs79JVVDVJigxz2LHuxHyxNjpzjwO4q 5CLB5HWpjR/vSDzh7P0HOhuRyfw0upoqCoqs0bf3ooz1jXevySk= =y+wd -----END PGP SIGNATURE----- Merge tag 'riscv-cache-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers RISC-V cache drivers for v6.16 SiFive: Add support for the Eswin EIC7700 SoC, which needs to make sure of the non-standard cache-ops provided by the ccache driver. Bindings: Conversions for two Marvell bindings to yaml, and additions of two soc-specific compatibles to the axm45mp bindings. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-cache-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: dt-bindings: cache: add QiLai compatible to ax45mp dt-bindings: cache: Convert marvell,tauros2-cache to DT schema dt-bindings: cache: Convert marvell,{feroceon,kirkwood}-cache to DT schema dt-bindings: cache: add specific RZ/Five compatible to ax45mp cache: sifive_ccache: Add ESWIN EIC7700 support dt-bindings: cache: sifive,ccache0: Add ESWIN EIC7700 SoC compatibility Link: https://lore.kernel.org/r/20250516-liability-facility-667fc14a2a85@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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| .. | ||
| andestech,ax45mp-cache.yaml | ||
| baikal,bt1-l2-ctl.yaml | ||
| freescale-l2cache.txt | ||
| l2c2x0.yaml | ||
| marvell,kirkwood-cache.yaml | ||
| marvell,tauros2-cache.yaml | ||
| qcom,llcc.yaml | ||
| sifive,ccache0.yaml | ||
| socionext,uniphier-system-cache.yaml | ||
| starfive,jh8100-starlink-cache.yaml | ||