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Document newly added "count_clock" sysfs entry for the Mellanox BlueField PMC driver. Signed-off-by: Shravan Kumar Ramani <shravankr@nvidia.com> Reviewed-by: David Thompson <davthompson@nvidia.com> Link: https://lore.kernel.org/r/367301238efff01fc200c67bca461c0424baf95d.1736413033.git.shravankr@nvidia.com [ij: corrected KernelVersion & Date] Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
64 lines
2.6 KiB
Text
64 lines
2.6 KiB
Text
HID Driver Description
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MLNXBFD0 mlxbf-pmc Performance counters (BlueField-1)
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MLNXBFD1 mlxbf-pmc Performance counters (BlueField-2)
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MLNXBFD2 mlxbf-pmc Performance counters (BlueField-3)
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What: /sys/bus/platform/devices/<HID>/hwmon/hwmonX/<block>/event_list
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Date: Dec 2020
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KernelVersion: 5.10
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Contact: "Shravan Kumar Ramani <shravankr@nvidia.com>"
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Description:
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List of events supported by the counters in the specific block.
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It is used to extract the event number or ID associated with
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each event.
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What: /sys/bus/platform/devices/<HID>/hwmon/hwmonX/<block>/event<N>
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Date: Dec 2020
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KernelVersion: 5.10
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Contact: "Shravan Kumar Ramani <shravankr@nvidia.com>"
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Description:
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Event monitored by corresponding counter. This is used to
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program or read back the event that should be or is currently
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being monitored by counter<N>.
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What: /sys/bus/platform/devices/<HID>/hwmon/hwmonX/<block>/counter<N>
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Date: Dec 2020
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KernelVersion: 5.10
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Contact: "Shravan Kumar Ramani <shravankr@nvidia.com>"
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Description:
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Counter value of the event being monitored. This is used to
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read the counter value of the event which was programmed using
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event<N>. This is also used to clear or reset the counter value
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by writing 0 to the counter sysfs.
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What: /sys/bus/platform/devices/<HID>/hwmon/hwmonX/<block>/enable
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Date: Dec 2020
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KernelVersion: 5.10
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Contact: "Shravan Kumar Ramani <shravankr@nvidia.com>"
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Description:
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Start or stop counters. This is used to start the counters
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for monitoring the programmed events and also to stop the
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counters after the desired duration. Writing value 1 will
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start all the counters in the block, and writing 0 will
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stop all the counters together.
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What: /sys/bus/platform/devices/<HID>/hwmon/hwmonX/<block>/<reg>
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Date: Dec 2020
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KernelVersion: 5.10
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Contact: "Shravan Kumar Ramani <shravankr@nvidia.com>"
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Description:
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Value of register. This is used to read or reset the registers
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where various performance statistics are counted for each block.
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Writing 0 to the sysfs will clear the counter, writing any other
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value is not allowed.
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What: /sys/bus/platform/devices/<HID>/hwmon/hwmonX/<block>/count_clock
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Date: Mar 2025
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KernelVersion: 6.14
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Contact: "Shravan Kumar Ramani <shravankr@nvidia.com>"
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Description:
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Use a counter for counting cycles. This is used to repurpose/dedicate
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any of the counters in the block to counting cycles. Each counter is
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represented by a bit (bit 0 for counter0, bit1 for counter1 and so on)
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and setting the corresponding bit will reserve that specific counter
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for counting cycles and override the event<N> setting.
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