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132833405e
Precision Time Management (PTM) mechanism defined in PCIe spec r6.0, sec 6.21 allows precise coordination of timing information across multiple components in a PCIe hierarchy with independent local time clocks. PCI core already supports enabling PTM in the root port and endpoint devices through PTM Extended Capability registers. But the PTM context supported by the PTM capable components such as Root Complex (RC) and Endpoint (EP) controllers were not exposed as of now. Part of the reason is that the spec doesn't define how the context information is exposed to the software and left it to the vendor implementation. So there is no standardized way to get access to the context information and each vendor have defined their own way. This commit adds debugfs support to expose the PTM context to userspace from both PCIe RC and EP controllers. Since the context information is exposed in a vendor specific way, the debugfs interface allows the controller drivers to implement callbacks for each attribute, to be called by the generic PTM driver. The Controller drivers are expected to call pcie_ptm_create_debugfs() to create the debugfs attributes for the PTM context and call pcie_ptm_destroy_debugfs() to destroy them. The drivers should also populate the relevant callbacks in the 'struct pcie_ptm_ops' structure based on the controller implementation. Below PTM context are exposed through debugfs: PCIe RC ======= 1. PTM Local clock 2. PTM T2 timestamp 3. PTM T3 timestamp 4. PTM Context valid PCIe EP ======= 1. PTM Local clock 2. PTM T1 timestamp 3. PTM T4 timestamp 4. PTM Master clock 5. PTM Context update Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> [kwilczynski: fix overflow issue reported by Dan Carpenter from https://lore.kernel.org/linux-pci/b41c1754-c6b7-4805-9f14-7c643d6c5304@suswa.mountain] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Link: https://patch.msgid.link/20250505-pcie-ptm-v4-1-02d26d51400b@linaro.org
70 lines
2.2 KiB
Text
70 lines
2.2 KiB
Text
What: /sys/kernel/debug/pcie_ptm_*/local_clock
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Date: May 2025
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Contact: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Description:
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(RO) PTM local clock in nanoseconds. Applicable for both Root
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Complex and Endpoint controllers.
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What: /sys/kernel/debug/pcie_ptm_*/master_clock
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Date: May 2025
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Contact: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Description:
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(RO) PTM master clock in nanoseconds. Applicable only for
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Endpoint controllers.
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What: /sys/kernel/debug/pcie_ptm_*/t1
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Date: May 2025
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Contact: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Description:
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(RO) PTM T1 timestamp in nanoseconds. Applicable only for
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Endpoint controllers.
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What: /sys/kernel/debug/pcie_ptm_*/t2
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Date: May 2025
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Contact: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Description:
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(RO) PTM T2 timestamp in nanoseconds. Applicable only for
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Root Complex controllers.
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What: /sys/kernel/debug/pcie_ptm_*/t3
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Date: May 2025
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Contact: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Description:
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(RO) PTM T3 timestamp in nanoseconds. Applicable only for
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Root Complex controllers.
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What: /sys/kernel/debug/pcie_ptm_*/t4
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Date: May 2025
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Contact: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Description:
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(RO) PTM T4 timestamp in nanoseconds. Applicable only for
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Endpoint controllers.
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What: /sys/kernel/debug/pcie_ptm_*/context_update
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Date: May 2025
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Contact: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Description:
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(RW) Control the PTM context update mode. Applicable only for
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Endpoint controllers.
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Following values are supported:
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* auto = PTM context auto update trigger for every 10ms
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* manual = PTM context manual update. Writing 'manual' to this
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file triggers PTM context update (default)
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What: /sys/kernel/debug/pcie_ptm_*/context_valid
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Date: May 2025
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Contact: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Description:
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(RW) Control the PTM context validity (local clock timing).
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Applicable only for Root Complex controllers. PTM context is
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invalidated by hardware if the Root Complex enters low power
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mode or changes link frequency.
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Following values are supported:
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* 0 = PTM context invalid (default)
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* 1 = PTM context valid
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