mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-08-05 16:54:27 +00:00
da5b2ad1c2
After commit a0f7085f6a ("LoongArch: Add RANDOMIZE_KSTACK_OFFSET
support"), there are three new instructions "addi.d $fp, $sp, 32",
"sub.d $sp, $sp, $t0" and "addi.d $sp, $fp, -32" for the secondary
stack in do_syscall(), then there is a objtool warning "return with
modified stack frame" and no handle_syscall() which is the previous
frame of do_syscall() in the call trace when executing the command
"echo l > /proc/sysrq-trigger".
objdump shows something like this:
0000000000000000 <do_syscall>:
0: 02ff8063 addi.d $sp, $sp, -32
4: 29c04076 st.d $fp, $sp, 16
8: 29c02077 st.d $s0, $sp, 8
c: 29c06061 st.d $ra, $sp, 24
10: 02c08076 addi.d $fp, $sp, 32
...
74: 0011b063 sub.d $sp, $sp, $t0
...
a8: 4c000181 jirl $ra, $t0, 0
...
dc: 02ff82c3 addi.d $sp, $fp, -32
e0: 28c06061 ld.d $ra, $sp, 24
e4: 28c04076 ld.d $fp, $sp, 16
e8: 28c02077 ld.d $s0, $sp, 8
ec: 02c08063 addi.d $sp, $sp, 32
f0: 4c000020 jirl $zero, $ra, 0
The instruction "sub.d $sp, $sp, $t0" changes the stack bottom and the
new stack size is a random value, in order to find the return address of
do_syscall() which is stored in the original stack frame after executing
"jirl $ra, $t0, 0", it should use fp which points to the original stack
top.
At the beginning, the thought is tended to decode the secondary stack
instruction "sub.d $sp, $sp, $t0" and set it as a label, then check this
label for the two frame pointer instructions to change the cfa base and
cfa offset during the period of secondary stack in update_cfi_state().
This is valid for GCC but invalid for Clang due to there are different
secondary stack instructions for ClangBuiltLinux on LoongArch, something
like this:
0000000000000000 <do_syscall>:
...
88: 00119064 sub.d $a0, $sp, $a0
8c: 00150083 or $sp, $a0, $zero
...
Actually, it equals to a single instruction "sub.d $sp, $sp, $a0", but
there is no proper condition to check it as a label like GCC, and so the
beginning thought is not a good way.
Essentially, there are two special frame pointer instructions which are
"addi.d $fp, $sp, imm" and "addi.d $sp, $fp, imm", the first one points
fp to the original stack top and the second one restores the original
stack bottom from fp.
Based on the above analysis, in order to avoid adding an arch-specific
update_cfi_state(), we just add a member "frame_pointer" in the "struct
symbol" as a label to avoid affecting the current normal case, then set
it as true only if there is "addi.d $sp, $fp, imm". The last is to check
this label for the two frame pointer instructions to change the cfa base
and cfa offset in update_cfi_state().
Tested with the following two configs:
(1) CONFIG_RANDOMIZE_KSTACK_OFFSET=y &&
CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT=n
(2) CONFIG_RANDOMIZE_KSTACK_OFFSET=y &&
CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT=y
By the way, there is no effect for x86 with this patch, tested on the
x86 machine with Fedora 40 system.
Cc: stable@vger.kernel.org # 6.9+
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
365 lines
8.4 KiB
C
365 lines
8.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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#include <string.h>
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#include <objtool/check.h>
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#include <objtool/warn.h>
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#include <asm/inst.h>
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#include <asm/orc_types.h>
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#include <linux/objtool_types.h>
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#ifndef EM_LOONGARCH
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#define EM_LOONGARCH 258
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#endif
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int arch_ftrace_match(char *name)
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{
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return !strcmp(name, "_mcount");
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}
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unsigned long arch_jump_destination(struct instruction *insn)
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{
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return insn->offset + (insn->immediate << 2);
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}
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unsigned long arch_dest_reloc_offset(int addend)
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{
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return addend;
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}
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bool arch_pc_relative_reloc(struct reloc *reloc)
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{
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return false;
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}
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bool arch_callee_saved_reg(unsigned char reg)
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{
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switch (reg) {
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case CFI_RA:
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case CFI_FP:
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case CFI_S0 ... CFI_S8:
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return true;
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default:
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return false;
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}
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}
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int arch_decode_hint_reg(u8 sp_reg, int *base)
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{
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switch (sp_reg) {
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case ORC_REG_UNDEFINED:
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*base = CFI_UNDEFINED;
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break;
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case ORC_REG_SP:
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*base = CFI_SP;
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break;
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case ORC_REG_FP:
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*base = CFI_FP;
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break;
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default:
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return -1;
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}
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return 0;
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}
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static bool is_loongarch(const struct elf *elf)
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{
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if (elf->ehdr.e_machine == EM_LOONGARCH)
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return true;
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WARN("unexpected ELF machine type %d", elf->ehdr.e_machine);
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return false;
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}
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#define ADD_OP(op) \
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if (!(op = calloc(1, sizeof(*op)))) \
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return -1; \
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else for (*ops_list = op, ops_list = &op->next; op; op = NULL)
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static bool decode_insn_reg0i26_fomat(union loongarch_instruction inst,
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struct instruction *insn)
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{
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switch (inst.reg0i26_format.opcode) {
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case b_op:
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insn->type = INSN_JUMP_UNCONDITIONAL;
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insn->immediate = sign_extend64(inst.reg0i26_format.immediate_h << 16 |
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inst.reg0i26_format.immediate_l, 25);
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break;
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case bl_op:
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insn->type = INSN_CALL;
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insn->immediate = sign_extend64(inst.reg0i26_format.immediate_h << 16 |
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inst.reg0i26_format.immediate_l, 25);
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break;
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default:
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return false;
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}
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return true;
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}
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static bool decode_insn_reg1i21_fomat(union loongarch_instruction inst,
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struct instruction *insn)
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{
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switch (inst.reg1i21_format.opcode) {
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case beqz_op:
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case bnez_op:
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case bceqz_op:
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insn->type = INSN_JUMP_CONDITIONAL;
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insn->immediate = sign_extend64(inst.reg1i21_format.immediate_h << 16 |
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inst.reg1i21_format.immediate_l, 20);
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break;
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default:
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return false;
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}
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return true;
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}
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static bool decode_insn_reg2i12_fomat(union loongarch_instruction inst,
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struct instruction *insn,
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struct stack_op **ops_list,
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struct stack_op *op)
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{
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switch (inst.reg2i12_format.opcode) {
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case addid_op:
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if ((inst.reg2i12_format.rd == CFI_SP) || (inst.reg2i12_format.rj == CFI_SP)) {
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/* addi.d sp,sp,si12 or addi.d fp,sp,si12 or addi.d sp,fp,si12 */
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insn->immediate = sign_extend64(inst.reg2i12_format.immediate, 11);
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ADD_OP(op) {
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op->src.type = OP_SRC_ADD;
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op->src.reg = inst.reg2i12_format.rj;
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op->src.offset = insn->immediate;
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op->dest.type = OP_DEST_REG;
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op->dest.reg = inst.reg2i12_format.rd;
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}
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}
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if ((inst.reg2i12_format.rd == CFI_SP) && (inst.reg2i12_format.rj == CFI_FP)) {
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/* addi.d sp,fp,si12 */
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struct symbol *func = find_func_containing(insn->sec, insn->offset);
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if (!func)
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return false;
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func->frame_pointer = true;
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}
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break;
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case ldd_op:
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if (inst.reg2i12_format.rj == CFI_SP) {
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/* ld.d rd,sp,si12 */
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insn->immediate = sign_extend64(inst.reg2i12_format.immediate, 11);
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ADD_OP(op) {
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op->src.type = OP_SRC_REG_INDIRECT;
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op->src.reg = CFI_SP;
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op->src.offset = insn->immediate;
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op->dest.type = OP_DEST_REG;
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op->dest.reg = inst.reg2i12_format.rd;
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}
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}
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break;
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case std_op:
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if (inst.reg2i12_format.rj == CFI_SP) {
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/* st.d rd,sp,si12 */
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insn->immediate = sign_extend64(inst.reg2i12_format.immediate, 11);
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ADD_OP(op) {
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op->src.type = OP_SRC_REG;
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op->src.reg = inst.reg2i12_format.rd;
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op->dest.type = OP_DEST_REG_INDIRECT;
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op->dest.reg = CFI_SP;
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op->dest.offset = insn->immediate;
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}
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}
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break;
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case andi_op:
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if (inst.reg2i12_format.rd == 0 &&
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inst.reg2i12_format.rj == 0 &&
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inst.reg2i12_format.immediate == 0)
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/* andi r0,r0,0 */
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insn->type = INSN_NOP;
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break;
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default:
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return false;
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}
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return true;
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}
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static bool decode_insn_reg2i14_fomat(union loongarch_instruction inst,
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struct instruction *insn,
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struct stack_op **ops_list,
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struct stack_op *op)
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{
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switch (inst.reg2i14_format.opcode) {
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case ldptrd_op:
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if (inst.reg2i14_format.rj == CFI_SP) {
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/* ldptr.d rd,sp,si14 */
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insn->immediate = sign_extend64(inst.reg2i14_format.immediate, 13);
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ADD_OP(op) {
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op->src.type = OP_SRC_REG_INDIRECT;
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op->src.reg = CFI_SP;
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op->src.offset = insn->immediate;
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op->dest.type = OP_DEST_REG;
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op->dest.reg = inst.reg2i14_format.rd;
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}
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}
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break;
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case stptrd_op:
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if (inst.reg2i14_format.rj == CFI_SP) {
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/* stptr.d ra,sp,0 */
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if (inst.reg2i14_format.rd == LOONGARCH_GPR_RA &&
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inst.reg2i14_format.immediate == 0)
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break;
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/* stptr.d rd,sp,si14 */
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insn->immediate = sign_extend64(inst.reg2i14_format.immediate, 13);
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ADD_OP(op) {
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op->src.type = OP_SRC_REG;
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op->src.reg = inst.reg2i14_format.rd;
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op->dest.type = OP_DEST_REG_INDIRECT;
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op->dest.reg = CFI_SP;
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op->dest.offset = insn->immediate;
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}
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}
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break;
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default:
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return false;
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}
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return true;
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}
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static bool decode_insn_reg2i16_fomat(union loongarch_instruction inst,
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struct instruction *insn)
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{
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switch (inst.reg2i16_format.opcode) {
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case jirl_op:
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if (inst.reg2i16_format.rd == 0 &&
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inst.reg2i16_format.rj == CFI_RA &&
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inst.reg2i16_format.immediate == 0) {
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/* jirl r0,ra,0 */
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insn->type = INSN_RETURN;
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} else if (inst.reg2i16_format.rd == CFI_RA) {
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/* jirl ra,rj,offs16 */
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insn->type = INSN_CALL_DYNAMIC;
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} else if (inst.reg2i16_format.rd == CFI_A0 &&
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inst.reg2i16_format.immediate == 0) {
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/*
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* jirl a0,t0,0
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* this is a special case in loongarch_suspend_enter,
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* just treat it as a call instruction.
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*/
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insn->type = INSN_CALL_DYNAMIC;
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} else if (inst.reg2i16_format.rd == 0 &&
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inst.reg2i16_format.immediate == 0) {
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/* jirl r0,rj,0 */
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insn->type = INSN_JUMP_DYNAMIC;
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} else if (inst.reg2i16_format.rd == 0 &&
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inst.reg2i16_format.immediate != 0) {
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/*
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* jirl r0,t0,12
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* this is a rare case in JUMP_VIRT_ADDR,
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* just ignore it due to it is harmless for tracing.
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*/
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break;
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} else {
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/* jirl rd,rj,offs16 */
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insn->type = INSN_JUMP_UNCONDITIONAL;
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insn->immediate = sign_extend64(inst.reg2i16_format.immediate, 15);
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}
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break;
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case beq_op:
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case bne_op:
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case blt_op:
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case bge_op:
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case bltu_op:
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case bgeu_op:
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insn->type = INSN_JUMP_CONDITIONAL;
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insn->immediate = sign_extend64(inst.reg2i16_format.immediate, 15);
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break;
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default:
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return false;
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}
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return true;
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}
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int arch_decode_instruction(struct objtool_file *file, const struct section *sec,
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unsigned long offset, unsigned int maxlen,
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struct instruction *insn)
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{
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struct stack_op **ops_list = &insn->stack_ops;
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const struct elf *elf = file->elf;
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struct stack_op *op = NULL;
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union loongarch_instruction inst;
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if (!is_loongarch(elf))
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return -1;
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if (maxlen < LOONGARCH_INSN_SIZE)
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return 0;
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insn->len = LOONGARCH_INSN_SIZE;
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insn->type = INSN_OTHER;
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insn->immediate = 0;
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inst = *(union loongarch_instruction *)(sec->data->d_buf + offset);
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if (decode_insn_reg0i26_fomat(inst, insn))
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return 0;
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if (decode_insn_reg1i21_fomat(inst, insn))
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return 0;
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if (decode_insn_reg2i12_fomat(inst, insn, ops_list, op))
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return 0;
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if (decode_insn_reg2i14_fomat(inst, insn, ops_list, op))
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return 0;
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if (decode_insn_reg2i16_fomat(inst, insn))
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return 0;
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if (inst.word == 0)
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insn->type = INSN_NOP;
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else if (inst.reg0i15_format.opcode == break_op) {
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/* break */
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insn->type = INSN_BUG;
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} else if (inst.reg2_format.opcode == ertn_op) {
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/* ertn */
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insn->type = INSN_RETURN;
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}
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return 0;
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}
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const char *arch_nop_insn(int len)
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{
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static u32 nop;
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if (len != LOONGARCH_INSN_SIZE)
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WARN("invalid NOP size: %d\n", len);
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nop = LOONGARCH_INSN_NOP;
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return (const char *)&nop;
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}
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const char *arch_ret_insn(int len)
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{
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static u32 ret;
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if (len != LOONGARCH_INSN_SIZE)
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WARN("invalid RET size: %d\n", len);
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emit_jirl((union loongarch_instruction *)&ret, LOONGARCH_GPR_RA, LOONGARCH_GPR_ZERO, 0);
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return (const char *)&ret;
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}
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void arch_initial_func_cfi_state(struct cfi_init_state *state)
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{
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int i;
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for (i = 0; i < CFI_NUM_REGS; i++) {
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state->regs[i].base = CFI_UNDEFINED;
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state->regs[i].offset = 0;
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}
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/* initial CFA (call frame address) */
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state->cfa.base = CFI_SP;
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state->cfa.offset = 0;
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}
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