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-----BEGIN PGP SIGNATURE----- iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAmdE14wUHGJoZWxnYWFz QGdvb2dsZS5jb20ACgkQWYigwDrT+vxMPRAAslaEhHZ06cU/I+BA0UrMJBbzOw+/ XM2XUojxWaNMYSBPVXbtSBrfFMnox4G3hFBPK0T0HiWoc7wGx/TUVJk65ioqM8ug gS/U3NjSlqlnH8NHxKrb/2t0tlMvSll9WwumOD9pMFeMGFOS3fAgUk+fBqXFYsI/ RsVRMavW9BucZ0yMHpgr0KGLPSt3HK/E1h0NLO+TN6dpFcoIq3XimKFyk1QQQgiR V3W21JMwjw+lDnUAsijU+RBYi5Fj6Rpqig/biRnzagVE6PJOci3ZJEBE7dGqm4LM UlgG6Ql/eK+bb3fPhcXxVmscj5XlEfbesX5PUzTmuj79Wq5l9hpy+0c654G79y8b rGiEVGM0NxmRdbuhWQUM2EsffqFlkFu7MN3gH0tP0Z0t3VTXfBcGrQJfqCcSCZG3 5IwGdEE2kmGb5c3RApZrm+HCXdxhb3Nwc3P8c27eXDT4eqHWDJag4hzLETNBdIrn Rsbgry6zzAVA6lLT0uasUlWerq/I6OrueJvnEKRGKDtbw/JL6PLveR1Rvsc//cQD Tu4FcG81bldQTUOdHEgFyJgmSu77Gvfs5RZBV0cEtcCBc33uGJne08kOdGD4BwWJ dqN3wJFh5yX4jlMGmBDw0KmFIwKstfUCIoDE4Kjtal02CURhz5ZCDVGNPnSUKN0C hflVX0//cRkHc5g= =2Otz -----END PGP SIGNATURE----- Merge tag 'pci-v6.13-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci Pull PCI updates from Bjorn Helgaas: "Enumeration: - Make pci_stop_dev() and pci_destroy_dev() safe so concurrent callers can't stop a device multiple times, even as we migrate from the global pci_rescan_remove_lock to finer-grained locking (Keith Busch) - Improve pci_walk_bus() implementation by making it recursive and moving locking up to avoid need for a 'locked' parameter (Keith Busch) - Unexport pci_walk_bus_locked(), which is only used internally by the PCI core (Keith Busch) - Detect some Thunderbolt chips that are built-in and hence 'trustworthy' by a heuristic since the 'ExternalFacingPort' and 'usb4-host-interface' ACPI properties are not quite enough (Esther Shimanovich) Resource management: - Use PCI bus addresses (not CPU addresses) in 'ranges' properties when building dynamic DT nodes so systems where PCI and CPU addresses differ work correctly (Andrea della Porta) - Tidy resource sizing and assignment with helpers to reduce redundancy (Ilpo Järvinen) - Improve pdev_sort_resources() 'bogus alignment' warning to be more specific (Ilpo Järvinen) Driver binding: - Convert driver .remove_new() callbacks to .remove() again to finish the conversion from returning 'int' to being 'void' (Sergio Paracuellos) - Export pcim_request_all_regions(), a managed interface to request all BARs (Philipp Stanner) - Replace pcim_iomap_regions_request_all() with pcim_request_all_regions(), and pcim_iomap_table()[n] with pcim_iomap(n), in the following drivers: ahci, crypto qat, crypto octeontx2, intel_th, iwlwifi, ntb idt, serial rp2, ALSA korg1212 (Philipp Stanner) - Remove the now unused pcim_iomap_regions_request_all() (Philipp Stanner) - Export pcim_iounmap_region(), a managed interface to unmap and release a PCI BAR (Philipp Stanner) - Replace pcim_iomap_regions(mask) with pcim_iomap_region(n), and pcim_iounmap_regions(mask) with pcim_iounmap_region(n), in the following drivers: fpga dfl-pci, block mtip32xx, gpio-merrifield, cavium (Philipp Stanner) Error handling: - Add sysfs 'reset_subordinate' to reset the entire hierarchy below a bridge; previously Secondary Bus Reset could only be used when there was a single device below a bridge (Keith Busch) - Warn if we reset a running device where the driver didn't register pci_error_handlers notification callbacks (Keith Busch) ASPM: - Disable ASPM L1 before touching L1 PM Substates to follow the spec closer and avoid a CPU load timeout on some platforms (Ajay Agarwal) - Set devices below Intel VMD to D0 before enabling ASPM L1 Substates as required per spec for all L1 Substates changes (Jian-Hong Pan) Power management: - Enable starfive controller runtime PM before probing host bridge (Mayank Rana) - Enable runtime power management for host bridges (Krishna chaitanya chundru) Power control: - Use of_platform_device_create() instead of of_platform_populate() to create pwrctl platform devices so we can control it based on the child nodes (Manivannan Sadhasivam) - Create pwrctrl platform devices only if there's a relevant power supply property (Manivannan Sadhasivam) - Add device link from the pwrctl supplier to the PCI dev to ensure pwrctl drivers are probed before the PCI dev driver; this avoids a race where pwrctl could change device power state while the PCI driver was active (Manivannan Sadhasivam) - Find pwrctl device for removal with of_find_device_by_node() instead of searching all children of the parent (Manivannan Sadhasivam) - Rename 'pwrctl' to 'pwrctrl' to match new bandwidth controller ('bwctrl') and hotplug files (Bjorn Helgaas) Bandwidth control: - Add read/modify/write locking for Link Control 2, which is used to manage Link speed (Ilpo Järvinen) - Extract Link Bandwidth Management Status check into pcie_lbms_seen(), where it can be shared between the bandwidth controller and quirks that use it to help retrain failed links (Ilpo Järvinen) - Re-add Link Bandwidth notification support with updates to address the reasons it was previously reverted (Alexandru Gagniuc, Ilpo Järvinen) - Add pcie_set_target_speed() and related functionality so drivers can manage PCIe Link speed based on thermal or other constraints (Ilpo Järvinen) - Add a thermal cooling driver to throttle PCIe Links via the existing thermal management framework (Ilpo Järvinen) - Add a userspace selftest for the PCIe bandwidth controller (Ilpo Järvinen) PCI device hotplug: - Add hotplug controller driver for Marvell OCTEON multi-function device where function 0 has a management console interface to enable/disable and provision various personalities for the other functions (Shijith Thotton) - Retain a reference to the pci_bus for the lifetime of a pci_slot to avoid a use-after-free when the thunderbolt driver resets USB4 host routers on boot, causing hotplug remove/add of downstream docks or other devices (Lukas Wunner) - Remove unused cpcihp struct cpci_hp_controller_ops.hardware_test (Guilherme Giacomo Simoes) - Remove unused cpqphp struct ctrl_dbg.ctrl (Christophe JAILLET) - Use pci_bus_read_dev_vendor_id() instead of hand-coded presence detection in cpqphp (Ilpo Järvinen) - Simplify cpqphp enumeration, which is already simple-minded and doesn't handle devices below hot-added bridges (Ilpo Järvinen) Virtualization: - Add ACS quirk for Wangxun FF5xxx NICs, which don't advertise an ACS capability but do isolate functions as though PCI_ACS_RR and PCI_ACS_CR were set, so the functions can be in independent IOMMU groups (Mengyuan Lou) TLP Processing Hints (TPH): - Add and document TLP Processing Hints (TPH) support so drivers can enable and disable TPH and the kernel can save/restore TPH configuration (Wei Huang) - Add TPH Steering Tag support so drivers can retrieve Steering Tag values associated with specific CPUs via an ACPI _DSM to improve performance by directing DMA writes closer to their consumers (Wei Huang) Data Object Exchange (DOE): - Wait up to 1 second for DOE Busy bit to clear before writing a request to the mailbox to avoid failures if the mailbox is still busy from a previous transfer (Gregory Price) Endpoint framework: - Skip attempts to allocate from endpoint controller memory window if the requested size is larger than the window (Damien Le Moal) - Add and document pci_epc_mem_map() and pci_epc_mem_unmap() to handle controller-specific size and alignment constraints, and add test cases to the endpoint test driver (Damien Le Moal) - Implement dwc pci_epc_ops.align_addr() so pci_epc_mem_map() can observe DWC-specific alignment requirements (Damien Le Moal) - Synchronously cancel command handler work in endpoint test before cleaning up DMA and BARs (Damien Le Moal) - Respect endpoint page size in dw_pcie_ep_align_addr() (Niklas Cassel) - Use dw_pcie_ep_align_addr() in dw_pcie_ep_raise_msi_irq() and dw_pcie_ep_raise_msix_irq() instead of open coding the equivalent (Niklas Cassel) - Avoid NULL dereference if Modem Host Interface Endpoint lacks 'mmio' DT property (Zhongqiu Han) - Release PCI domain ID of Endpoint controller parent (not controller itself) and before unregistering the controller, to avoid use-after-free (Zijun Hu) - Clear secondary (not primary) EPC in pci_epc_remove_epf() when removing the secondary controller associated with an NTB (Zijun Hu) Cadence PCIe controller driver: - Lower severity of 'phy-names' message (Bartosz Wawrzyniak) Freescale i.MX6 PCIe controller driver: - Fix suspend/resume support on i.MX6QDL, which has a hardware erratum that prevents use of L2 (Stefan Eichenberger) Intel VMD host bridge driver: - Add 0xb60b and 0xb06f Device IDs for client SKUs (Nirmal Patel) MediaTek PCIe Gen3 controller driver: - Update mediatek-gen3 DT binding to require the exact number of clocks for each SoC (Fei Shao) - Add support for DT 'max-link-speed' and 'num-lanes' properties to restrict the link speed and width (AngeloGioacchino Del Regno) Microchip PolarFlare PCIe controller driver: - Add DT and driver support for using either of the two PolarFire Root Ports (Conor Dooley) NVIDIA Tegra194 PCIe controller driver: - Move endpoint controller cleanups that depend on refclk from the host to the notifier that tells us the host has deasserted PERST#, when refclk should be valid (Manivannan Sadhasivam) Qualcomm PCIe controller driver: - Add qcom SAR2130P DT binding with an additional clock (Dmitry Baryshkov) - Enable MSI interrupts if 'global' IRQ is supported, since a previous commit unintentionally masked them (Manivannan Sadhasivam) - Move endpoint controller cleanups that depend on refclk from the host to the notifier that tells us the host has deasserted PERST#, when refclk should be valid (Manivannan Sadhasivam) - Add DT binding and driver support for IPQ9574, with Synopsys IP v5.80a and Qcom IP 1.27.0 (devi priya) - Move the OPP "operating-points-v2" table from the qcom,pcie-sm8450.yaml DT binding to qcom,pcie-common.yaml, where it can be used by other Qcom platforms (Qiang Yu) - Add 'global' SPI interrupt for events like link-up, link-down to qcom,pcie-x1e80100 DT binding so we can start enumeration when the link comes up (Qiang Yu) - Disable ASPM L0s for qcom,pcie-x1e80100 since the PHY is not tuned to support this (Qiang Yu) - Add ops_1_21_0 for SC8280X family SoC, which doesn't use the 'iommu-map' DT property and doesn't need BDF-to-SID translation (Qiang Yu) Rockchip PCIe controller driver: - Define ROCKCHIP_PCIE_AT_SIZE_ALIGN to replace magic 256 endpoint .align value (Damien Le Moal) - When unmapping an endpoint window, compute the region index instead of searching for it, and verify that the address was mapped (Damien Le Moal) - When mapping an endpoint window, verify that the address hasn't been mapped already (Damien Le Moal) - Implement pci_epc_ops.align_addr() for rockchip-ep (Damien Le Moal) - Fix MSI IRQ data mapping to observe the alignment constraint, which fixes intermittent page faults in memcpy_toio() and memcpy_fromio() (Damien Le Moal) - Rename rockchip_pcie_parse_ep_dt() to rockchip_pcie_ep_get_resources() for consistency with similar DT interfaces (Damien Le Moal) - Skip the unnecessary link train in rockchip_pcie_ep_probe() and do it only in the endpoint start operation (Damien Le Moal) - Implement pci_epc_ops.stop_link() to disable link training and controller configuration (Damien Le Moal) - Attempt link training at 5 GT/s when both partners support it (Damien Le Moal) - Add a handler for PERST# signal so we can detect host-initiated resets and start link training after PERST# is deasserted (Damien Le Moal) Synopsys DesignWare PCIe controller driver: - Clear outbound address on unmap so dw_pcie_find_index() won't match an ATU index that was already unmapped (Damien Le Moal) - Use of_property_present() instead of of_property_read_bool() when testing for presence of non-boolean DT properties (Rob Herring) - Advertise 1MB size if endpoint supports Resizable BARs, which was inadvertently lost in v6.11 (Niklas Cassel) TI J721E PCIe driver: - Add PCIe support for J722S SoC (Siddharth Vadapalli) - Delay PCIE_T_PVPERL_MS (100 ms), not just PCIE_T_PERST_CLK_US (100 us), before deasserting PERST# to ensure power and refclk are stable (Siddharth Vadapalli) TI Keystone PCIe controller driver: - Set the 'ti,keystone-pcie' mode so v3.65a devices work in Root Complex mode (Kishon Vijay Abraham I) - Try to avoid unrecoverable SError for attempts to issue config transactions when the link is down; this is racy but the best we can do (Kishon Vijay Abraham I) Miscellaneous: - Reorganize kerneldoc parameter names to match order in function signature (Julia Lawall) - Fix sysfs reset_method_store() memory leak (Todd Kjos) - Simplify pci_create_slot() (Ilpo Järvinen) - Fix incorrect printf format specifiers in pcitest (Luo Yifan)" * tag 'pci-v6.13-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (127 commits) PCI: rockchip-ep: Handle PERST# signal in EP mode PCI: rockchip-ep: Improve link training PCI: rockship-ep: Implement the pci_epc_ops::stop_link() operation PCI: rockchip-ep: Refactor endpoint link training enable PCI: rockchip-ep: Refactor rockchip_pcie_ep_probe() MSI-X hiding PCI: rockchip-ep: Refactor rockchip_pcie_ep_probe() memory allocations PCI: rockchip-ep: Rename rockchip_pcie_parse_ep_dt() PCI: rockchip-ep: Fix MSI IRQ data mapping PCI: rockchip-ep: Implement the pci_epc_ops::align_addr() operation PCI: rockchip-ep: Improve rockchip_pcie_ep_map_addr() PCI: rockchip-ep: Improve rockchip_pcie_ep_unmap_addr() PCI: rockchip-ep: Use a macro to define EP controller .align feature PCI: rockchip-ep: Fix address translation unit programming PCI/pwrctrl: Rename pwrctrl functions and structures PCI/pwrctrl: Rename pwrctl files to pwrctrl PCI/pwrctl: Remove pwrctl device without iterating over all children of pwrctl parent PCI/pwrctl: Ensure that pwrctl drivers are probed before PCI client drivers PCI/pwrctl: Create pwrctl device only if at least one power supply is present PCI/pwrctl: Use of_platform_device_create() to create pwrctl devices tools: PCI: Fix incorrect printf format specifiers ...
384 lines
8.8 KiB
C
384 lines
8.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright IBM Corp. 2020
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*
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* Author(s):
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* Pierre Morel <pmorel@linux.ibm.com>
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*
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*/
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#define KMSG_COMPONENT "zpci"
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#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/export.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/jump_label.h>
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#include <linux/pci.h>
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#include <linux/printk.h>
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#include <asm/pci_clp.h>
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#include <asm/pci_dma.h>
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#include "pci_bus.h"
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#include "pci_iov.h"
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static LIST_HEAD(zbus_list);
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static DEFINE_MUTEX(zbus_list_lock);
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static int zpci_nb_devices;
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/* zpci_bus_prepare_device - Prepare a zPCI function for scanning
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* @zdev: the zPCI function to be prepared
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*
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* The PCI resources for the function are set up and added to its zbus and the
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* function is enabled. The function must be added to a zbus which must have
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* a PCI bus created. If an error occurs the zPCI function is not enabled.
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*
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* Return: 0 on success, an error code otherwise
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*/
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static int zpci_bus_prepare_device(struct zpci_dev *zdev)
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{
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int rc, i;
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if (!zdev_enabled(zdev)) {
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rc = zpci_enable_device(zdev);
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if (rc)
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return rc;
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}
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if (!zdev->has_resources) {
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zpci_setup_bus_resources(zdev);
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for (i = 0; i < PCI_STD_NUM_BARS; i++) {
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if (zdev->bars[i].res)
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pci_bus_add_resource(zdev->zbus->bus, zdev->bars[i].res);
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}
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}
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return 0;
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}
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/* zpci_bus_scan_device - Scan a single device adding it to the PCI core
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* @zdev: the zdev to be scanned
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*
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* Scans the PCI function making it available to the common PCI code.
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*
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* Return: 0 on success, an error value otherwise
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*/
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int zpci_bus_scan_device(struct zpci_dev *zdev)
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{
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struct pci_dev *pdev;
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int rc;
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rc = zpci_bus_prepare_device(zdev);
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if (rc)
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return rc;
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pdev = pci_scan_single_device(zdev->zbus->bus, zdev->devfn);
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if (!pdev)
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return -ENODEV;
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pci_lock_rescan_remove();
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pci_bus_add_device(pdev);
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pci_unlock_rescan_remove();
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return 0;
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}
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/* zpci_bus_remove_device - Removes the given zdev from the PCI core
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* @zdev: the zdev to be removed from the PCI core
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* @set_error: if true the device's error state is set to permanent failure
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*
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* Sets a zPCI device to a configured but offline state; the zPCI
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* device is still accessible through its hotplug slot and the zPCI
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* API but is removed from the common code PCI bus, making it
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* no longer available to drivers.
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*/
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void zpci_bus_remove_device(struct zpci_dev *zdev, bool set_error)
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{
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struct zpci_bus *zbus = zdev->zbus;
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struct pci_dev *pdev;
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if (!zdev->zbus->bus)
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return;
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pdev = pci_get_slot(zbus->bus, zdev->devfn);
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if (pdev) {
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if (set_error)
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pdev->error_state = pci_channel_io_perm_failure;
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if (pdev->is_virtfn) {
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zpci_iov_remove_virtfn(pdev, zdev->vfn);
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/* balance pci_get_slot */
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pci_dev_put(pdev);
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return;
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}
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pci_stop_and_remove_bus_device_locked(pdev);
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/* balance pci_get_slot */
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pci_dev_put(pdev);
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}
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}
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/* zpci_bus_scan_bus - Scan all configured zPCI functions on the bus
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* @zbus: the zbus to be scanned
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*
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* Enables and scans all PCI functions on the bus making them available to the
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* common PCI code. If a PCI function fails to be initialized an error will be
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* returned but attempts will still be made for all other functions on the bus.
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*
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* Return: 0 on success, an error value otherwise
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*/
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int zpci_bus_scan_bus(struct zpci_bus *zbus)
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{
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struct zpci_dev *zdev;
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int devfn, rc, ret = 0;
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for (devfn = 0; devfn < ZPCI_FUNCTIONS_PER_BUS; devfn++) {
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zdev = zbus->function[devfn];
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if (zdev && zdev->state == ZPCI_FN_STATE_CONFIGURED) {
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rc = zpci_bus_prepare_device(zdev);
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if (rc)
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ret = -EIO;
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}
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}
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pci_lock_rescan_remove();
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pci_scan_child_bus(zbus->bus);
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pci_bus_add_devices(zbus->bus);
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pci_unlock_rescan_remove();
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return ret;
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}
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/* zpci_bus_scan_busses - Scan all registered busses
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*
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* Scan all available zbusses
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*
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*/
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void zpci_bus_scan_busses(void)
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{
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struct zpci_bus *zbus = NULL;
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mutex_lock(&zbus_list_lock);
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list_for_each_entry(zbus, &zbus_list, bus_next) {
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zpci_bus_scan_bus(zbus);
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cond_resched();
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}
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mutex_unlock(&zbus_list_lock);
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}
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static bool zpci_bus_is_multifunction_root(struct zpci_dev *zdev)
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{
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return !s390_pci_no_rid && zdev->rid_available &&
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zpci_is_device_configured(zdev) &&
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!zdev->vfn;
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}
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/* zpci_bus_create_pci_bus - Create the PCI bus associated with this zbus
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* @zbus: the zbus holding the zdevices
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* @fr: PCI root function that will determine the bus's domain, and bus speed
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* @ops: the pci operations
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*
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* The PCI function @fr determines the domain (its UID), multifunction property
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* and maximum bus speed of the entire bus.
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*
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* Return: 0 on success, an error code otherwise
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*/
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static int zpci_bus_create_pci_bus(struct zpci_bus *zbus, struct zpci_dev *fr, struct pci_ops *ops)
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{
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struct pci_bus *bus;
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int domain;
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domain = zpci_alloc_domain((u16)fr->uid);
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if (domain < 0)
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return domain;
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zbus->domain_nr = domain;
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zbus->multifunction = zpci_bus_is_multifunction_root(fr);
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zbus->max_bus_speed = fr->max_bus_speed;
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/*
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* Note that the zbus->resources are taken over and zbus->resources
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* is empty after a successful call
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*/
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bus = pci_create_root_bus(NULL, ZPCI_BUS_NR, ops, zbus, &zbus->resources);
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if (!bus) {
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zpci_free_domain(zbus->domain_nr);
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return -EFAULT;
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}
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zbus->bus = bus;
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return 0;
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}
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static void zpci_bus_release(struct kref *kref)
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{
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struct zpci_bus *zbus = container_of(kref, struct zpci_bus, kref);
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if (zbus->bus) {
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pci_lock_rescan_remove();
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pci_stop_root_bus(zbus->bus);
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zpci_free_domain(zbus->domain_nr);
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pci_free_resource_list(&zbus->resources);
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pci_remove_root_bus(zbus->bus);
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pci_unlock_rescan_remove();
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}
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mutex_lock(&zbus_list_lock);
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list_del(&zbus->bus_next);
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mutex_unlock(&zbus_list_lock);
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kfree(zbus);
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}
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static void zpci_bus_put(struct zpci_bus *zbus)
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{
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kref_put(&zbus->kref, zpci_bus_release);
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}
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static struct zpci_bus *zpci_bus_get(int topo, bool topo_is_tid)
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{
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struct zpci_bus *zbus;
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mutex_lock(&zbus_list_lock);
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|
list_for_each_entry(zbus, &zbus_list, bus_next) {
|
|
if (!zbus->multifunction)
|
|
continue;
|
|
if (topo_is_tid == zbus->topo_is_tid && topo == zbus->topo) {
|
|
kref_get(&zbus->kref);
|
|
goto out_unlock;
|
|
}
|
|
}
|
|
zbus = NULL;
|
|
out_unlock:
|
|
mutex_unlock(&zbus_list_lock);
|
|
return zbus;
|
|
}
|
|
|
|
static struct zpci_bus *zpci_bus_alloc(int topo, bool topo_is_tid)
|
|
{
|
|
struct zpci_bus *zbus;
|
|
|
|
zbus = kzalloc(sizeof(*zbus), GFP_KERNEL);
|
|
if (!zbus)
|
|
return NULL;
|
|
|
|
zbus->topo = topo;
|
|
zbus->topo_is_tid = topo_is_tid;
|
|
INIT_LIST_HEAD(&zbus->bus_next);
|
|
mutex_lock(&zbus_list_lock);
|
|
list_add_tail(&zbus->bus_next, &zbus_list);
|
|
mutex_unlock(&zbus_list_lock);
|
|
|
|
kref_init(&zbus->kref);
|
|
INIT_LIST_HEAD(&zbus->resources);
|
|
|
|
zbus->bus_resource.start = 0;
|
|
zbus->bus_resource.end = ZPCI_BUS_NR;
|
|
zbus->bus_resource.flags = IORESOURCE_BUS;
|
|
pci_add_resource(&zbus->resources, &zbus->bus_resource);
|
|
|
|
return zbus;
|
|
}
|
|
|
|
void pcibios_bus_add_device(struct pci_dev *pdev)
|
|
{
|
|
struct zpci_dev *zdev = to_zpci(pdev);
|
|
|
|
/*
|
|
* With pdev->no_vf_scan the common PCI probing code does not
|
|
* perform PF/VF linking.
|
|
*/
|
|
if (zdev->vfn) {
|
|
zpci_iov_setup_virtfn(zdev->zbus, pdev, zdev->vfn);
|
|
pdev->no_command_memory = 1;
|
|
}
|
|
}
|
|
|
|
static int zpci_bus_add_device(struct zpci_bus *zbus, struct zpci_dev *zdev)
|
|
{
|
|
int rc = -EINVAL;
|
|
|
|
if (zbus->multifunction) {
|
|
if (!zdev->rid_available) {
|
|
WARN_ONCE(1, "rid_available not set for multifunction\n");
|
|
return rc;
|
|
}
|
|
zdev->devfn = zdev->rid & ZPCI_RID_MASK_DEVFN;
|
|
}
|
|
|
|
if (zbus->function[zdev->devfn]) {
|
|
pr_err("devfn %04x is already assigned\n", zdev->devfn);
|
|
return rc;
|
|
}
|
|
zdev->zbus = zbus;
|
|
zbus->function[zdev->devfn] = zdev;
|
|
zpci_nb_devices++;
|
|
|
|
rc = zpci_init_slot(zdev);
|
|
if (rc)
|
|
goto error;
|
|
zdev->has_hp_slot = 1;
|
|
|
|
return 0;
|
|
|
|
error:
|
|
zbus->function[zdev->devfn] = NULL;
|
|
zdev->zbus = NULL;
|
|
zpci_nb_devices--;
|
|
return rc;
|
|
}
|
|
|
|
int zpci_bus_device_register(struct zpci_dev *zdev, struct pci_ops *ops)
|
|
{
|
|
bool topo_is_tid = zdev->tid_avail;
|
|
struct zpci_bus *zbus = NULL;
|
|
int topo, rc = -EBADF;
|
|
|
|
if (zpci_nb_devices == ZPCI_NR_DEVICES) {
|
|
pr_warn("Adding PCI function %08x failed because the configured limit of %d is reached\n",
|
|
zdev->fid, ZPCI_NR_DEVICES);
|
|
return -ENOSPC;
|
|
}
|
|
|
|
topo = topo_is_tid ? zdev->tid : zdev->pchid;
|
|
zbus = zpci_bus_get(topo, topo_is_tid);
|
|
if (!zbus) {
|
|
zbus = zpci_bus_alloc(topo, topo_is_tid);
|
|
if (!zbus)
|
|
return -ENOMEM;
|
|
}
|
|
|
|
if (!zbus->bus) {
|
|
/* The UID of the first PCI function registered with a zpci_bus
|
|
* is used as the domain number for that bus. Currently there
|
|
* is exactly one zpci_bus per domain.
|
|
*/
|
|
rc = zpci_bus_create_pci_bus(zbus, zdev, ops);
|
|
if (rc)
|
|
goto error;
|
|
}
|
|
|
|
rc = zpci_bus_add_device(zbus, zdev);
|
|
if (rc)
|
|
goto error;
|
|
|
|
return 0;
|
|
|
|
error:
|
|
pr_err("Adding PCI function %08x failed\n", zdev->fid);
|
|
zpci_bus_put(zbus);
|
|
return rc;
|
|
}
|
|
|
|
void zpci_bus_device_unregister(struct zpci_dev *zdev)
|
|
{
|
|
struct zpci_bus *zbus = zdev->zbus;
|
|
|
|
zpci_nb_devices--;
|
|
zbus->function[zdev->devfn] = NULL;
|
|
zpci_bus_put(zbus);
|
|
}
|