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git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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cdc118f802
Export kernel paravirt features to user space, so that VMM can control each single paravirt feature. By default paravirt features will be the same with kvm supported features if VMM does not set it. Also a new feature KVM_FEATURE_VIRT_EXTIOI is added which can be set from user space. This feature indicates that the virt EIOINTC can route interrupts to 256 vCPUs, rather than 4 vCPUs like with real HW. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
138 lines
4.3 KiB
C
138 lines
4.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020-2023 Loongson Technology Corporation Limited
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*/
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#ifndef __ASM_LOONGARCH_KVM_VCPU_H__
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#define __ASM_LOONGARCH_KVM_VCPU_H__
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#include <linux/kvm_host.h>
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#include <asm/loongarch.h>
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/* Controlled by 0x5 guest estat */
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#define CPU_SIP0 (_ULCAST_(1))
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#define CPU_SIP1 (_ULCAST_(1) << 1)
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#define CPU_PMU (_ULCAST_(1) << 10)
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#define CPU_TIMER (_ULCAST_(1) << 11)
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#define CPU_IPI (_ULCAST_(1) << 12)
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/* Controlled by 0x52 guest exception VIP aligned to estat bit 5~12 */
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#define CPU_IP0 (_ULCAST_(1))
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#define CPU_IP1 (_ULCAST_(1) << 1)
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#define CPU_IP2 (_ULCAST_(1) << 2)
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#define CPU_IP3 (_ULCAST_(1) << 3)
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#define CPU_IP4 (_ULCAST_(1) << 4)
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#define CPU_IP5 (_ULCAST_(1) << 5)
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#define CPU_IP6 (_ULCAST_(1) << 6)
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#define CPU_IP7 (_ULCAST_(1) << 7)
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#define MNSEC_PER_SEC (NSEC_PER_SEC >> 20)
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/* KVM_IRQ_LINE irq field index values */
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#define KVM_LOONGSON_IRQ_TYPE_SHIFT 24
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#define KVM_LOONGSON_IRQ_TYPE_MASK 0xff
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#define KVM_LOONGSON_IRQ_VCPU_SHIFT 16
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#define KVM_LOONGSON_IRQ_VCPU_MASK 0xff
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#define KVM_LOONGSON_IRQ_NUM_SHIFT 0
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#define KVM_LOONGSON_IRQ_NUM_MASK 0xffff
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typedef union loongarch_instruction larch_inst;
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typedef int (*exit_handle_fn)(struct kvm_vcpu *);
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int kvm_emu_mmio_read(struct kvm_vcpu *vcpu, larch_inst inst);
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int kvm_emu_mmio_write(struct kvm_vcpu *vcpu, larch_inst inst);
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int kvm_complete_mmio_read(struct kvm_vcpu *vcpu, struct kvm_run *run);
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int kvm_complete_iocsr_read(struct kvm_vcpu *vcpu, struct kvm_run *run);
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int kvm_emu_idle(struct kvm_vcpu *vcpu);
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int kvm_pending_timer(struct kvm_vcpu *vcpu);
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int kvm_handle_fault(struct kvm_vcpu *vcpu, int fault);
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void kvm_deliver_intr(struct kvm_vcpu *vcpu);
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void kvm_deliver_exception(struct kvm_vcpu *vcpu);
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void kvm_own_fpu(struct kvm_vcpu *vcpu);
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void kvm_lose_fpu(struct kvm_vcpu *vcpu);
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void kvm_save_fpu(struct loongarch_fpu *fpu);
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void kvm_restore_fpu(struct loongarch_fpu *fpu);
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void kvm_restore_fcsr(struct loongarch_fpu *fpu);
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#ifdef CONFIG_CPU_HAS_LSX
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int kvm_own_lsx(struct kvm_vcpu *vcpu);
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void kvm_save_lsx(struct loongarch_fpu *fpu);
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void kvm_restore_lsx(struct loongarch_fpu *fpu);
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#else
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static inline int kvm_own_lsx(struct kvm_vcpu *vcpu) { return -EINVAL; }
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static inline void kvm_save_lsx(struct loongarch_fpu *fpu) { }
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static inline void kvm_restore_lsx(struct loongarch_fpu *fpu) { }
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#endif
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#ifdef CONFIG_CPU_HAS_LASX
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int kvm_own_lasx(struct kvm_vcpu *vcpu);
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void kvm_save_lasx(struct loongarch_fpu *fpu);
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void kvm_restore_lasx(struct loongarch_fpu *fpu);
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#else
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static inline int kvm_own_lasx(struct kvm_vcpu *vcpu) { return -EINVAL; }
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static inline void kvm_save_lasx(struct loongarch_fpu *fpu) { }
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static inline void kvm_restore_lasx(struct loongarch_fpu *fpu) { }
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#endif
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#ifdef CONFIG_CPU_HAS_LBT
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int kvm_own_lbt(struct kvm_vcpu *vcpu);
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#else
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static inline int kvm_own_lbt(struct kvm_vcpu *vcpu) { return -EINVAL; }
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#endif
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void kvm_init_timer(struct kvm_vcpu *vcpu, unsigned long hz);
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void kvm_save_timer(struct kvm_vcpu *vcpu);
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void kvm_restore_timer(struct kvm_vcpu *vcpu);
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int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq);
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struct kvm_vcpu *kvm_get_vcpu_by_cpuid(struct kvm *kvm, int cpuid);
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/*
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* Loongarch KVM guest interrupt handling
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*/
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static inline void kvm_queue_irq(struct kvm_vcpu *vcpu, unsigned int irq)
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{
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set_bit(irq, &vcpu->arch.irq_pending);
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clear_bit(irq, &vcpu->arch.irq_clear);
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}
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static inline void kvm_dequeue_irq(struct kvm_vcpu *vcpu, unsigned int irq)
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{
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clear_bit(irq, &vcpu->arch.irq_pending);
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set_bit(irq, &vcpu->arch.irq_clear);
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}
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static inline int kvm_queue_exception(struct kvm_vcpu *vcpu,
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unsigned int code, unsigned int subcode)
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{
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/* only one exception can be injected */
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if (!vcpu->arch.exception_pending) {
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set_bit(code, &vcpu->arch.exception_pending);
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vcpu->arch.esubcode = subcode;
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return 0;
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} else
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return -1;
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}
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static inline unsigned long kvm_read_reg(struct kvm_vcpu *vcpu, int num)
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{
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return vcpu->arch.gprs[num];
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}
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static inline void kvm_write_reg(struct kvm_vcpu *vcpu, int num, unsigned long val)
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{
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vcpu->arch.gprs[num] = val;
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}
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static inline bool kvm_pvtime_supported(void)
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{
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return !!sched_info_on();
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}
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static inline bool kvm_guest_has_pv_feature(struct kvm_vcpu *vcpu, unsigned int feature)
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{
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return vcpu->kvm->arch.pv_features & BIT(feature);
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}
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#endif /* __ASM_LOONGARCH_KVM_VCPU_H__ */
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