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96a9e2b2a2
According to documents [1], [2] and [3], we have 2 CAN devices on the
stm32f746 platform and 3 on the stm32f769 platform. So let's move the
can3 node from stm32f746.dtsi to stm32f769.dtsi.
[1] https://www.st.com/en/microcontrollers-microprocessors/stm32f7-series.html
[2] RM0385: STM32F75xxx and STM32F74xxx advanced Arm®-based 32-bit MCUs
[3] RM0410: STM32F76xxx and STM32F77xxx advanced Arm®-based 32-bit MCUs
Fixes: df362914ee ("ARM: dts: stm32: re-add CAN support on stm32f746")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
37 lines
900 B
Text
37 lines
900 B
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2023 Dario Binacchi <dario.binacchi@amarulasolutions.com>
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*/
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#include "stm32f746.dtsi"
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/ {
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soc {
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can3: can@40003400 {
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compatible = "st,stm32f4-bxcan";
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reg = <0x40003400 0x200>;
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interrupts = <104>, <105>, <106>, <107>;
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interrupt-names = "tx", "rx0", "rx1", "sce";
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resets = <&rcc STM32F7_APB1_RESET(CAN3)>;
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clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;
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st,gcan = <&gcan3>;
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status = "disabled";
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};
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gcan3: gcan@40003600 {
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compatible = "st,stm32f4-gcan", "syscon";
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reg = <0x40003600 0x200>;
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clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;
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};
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dsi: dsi@40016c00 {
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compatible = "st,stm32-dsi";
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reg = <0x40016c00 0x800>;
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clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>;
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clock-names = "pclk", "ref";
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resets = <&rcc STM32F7_APB2_RESET(DSI)>;
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reset-names = "apb";
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status = "disabled";
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};
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};
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};
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