linux/Documentation/devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml
Michal Simek f010990046 dt-bindings: rtc: zynqmp: Add support for Versal/Versal NET SoCs
Add support for Versal and Versal NET SoCs. Both of them should use the
same IP core but differences can be in integration part that's why create
separate compatible strings.

Also describe optional power-domains property. It is optional because power
domain doesn't need to be onwed by non secure firmware hence no access to
control it via any driver.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/5ecd775e6083f86aa744c4e9dfb7f6a13082c78a.1709804617.git.michal.simek@amd.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2024-03-08 12:06:04 +01:00

84 lines
1.6 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/rtc/xlnx,zynqmp-rtc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Xilinx Zynq Ultrascale+ MPSoC Real Time Clock
description:
RTC controller for the Xilinx Zynq MPSoC Real Time Clock.
The RTC controller has separate IRQ lines for seconds and alarm.
maintainers:
- Michal Simek <michal.simek@amd.com>
allOf:
- $ref: rtc.yaml#
properties:
compatible:
oneOf:
- const: xlnx,zynqmp-rtc
- items:
- enum:
- xlnx,versal-rtc
- xlnx,versal-net-rtc
- const: xlnx,zynqmp-rtc
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
items:
- const: rtc
interrupts:
maxItems: 2
interrupt-names:
items:
- const: alarm
- const: sec
calibration:
description: |
calibration value for 1 sec period which will
be programmed directly to calibration register.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0x1
maximum: 0x1FFFFF
default: 0x198233
deprecated: true
power-domains:
maxItems: 1
required:
- compatible
- reg
- interrupts
- interrupt-names
additionalProperties: false
examples:
- |
soc {
#address-cells = <2>;
#size-cells = <2>;
rtc: rtc@ffa60000 {
compatible = "xlnx,zynqmp-rtc";
reg = <0x0 0xffa60000 0x0 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 26 4>, <0 27 4>;
interrupt-names = "alarm", "sec";
calibration = <0x198233>;
clock-names = "rtc";
clocks = <&rtc_clk>;
};
};