Exact

Exact Union RegExp

Fabio Estevam fbe4ba6c5c dt-bindings: fpga: altr,fpga-passive-serial: Convert to yaml ... Convert the Altera Passive Serial SPI FPGA Manager binding from text file to yaml format to allow devicetree validation. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241003104230.1628813-1-festevam@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>		2024-10-03 10:35:28 -05:00
..
altera-pr-ip.txt
altera-socfpga-a10-fpga-mgr.txt
altera-socfpga-fpga-mgr.txt
altr,fpga-passive-serial.yaml	dt-bindings: fpga: altr,fpga-passive-serial: Convert to yaml	2024-10-03 10:35:28 -05:00
altr,freeze-bridge-controller.yaml	dt-bindings: fpga: altera: Convert bridge bindings to yaml	2024-01-11 15:50:56 -06:00
altr,socfpga-fpga2sdram-bridge.yaml	dt-bindings: fpga: altera: Convert bridge bindings to yaml	2024-01-11 15:50:56 -06:00
altr,socfpga-hps2fpga-bridge.yaml	dt-bindings: fpga: altera: Convert bridge bindings to yaml	2024-01-11 15:50:56 -06:00
fpga-bridge.yaml	dt-bindings: fpga: Convert bridge binding to yaml	2024-01-11 15:50:56 -06:00
fpga-region.yaml	dt-bindings: fpga: Convert fpga-region binding to yaml	2024-01-31 16:05:18 -06:00
intel-stratix10-soc-fpga-mgr.txt
lattice,sysconfig.yaml
lattice-ice40-fpga-mgr.txt
lattice-machxo2-spi.txt
microchip,mpf-spi-fpga-mgr.yaml
xilinx-zynq-fpga-mgr.yaml	dt-bindings: xilinx: Switch xilinx.com emails to amd.com	2023-06-05 13:09:19 +02:00
xlnx,fpga-selectmap.yaml	dt-bindings: fpga: xlnx,fpga-selectmap: add DT schema	2024-03-31 22:42:10 +08:00
xlnx,fpga-slave-serial.yaml
xlnx,pr-decoupler.yaml	dt-bindings: fpga: Convert bridge binding to yaml	2024-01-11 15:50:56 -06:00
xlnx,versal-fpga.yaml	dt-bindings: firmware: xilinx: Fix versal-fpga node name	2024-01-22 14:01:38 +01:00
xlnx,zynqmp-pcap-fpga.yaml	dt-bindings: xilinx: Switch xilinx.com emails to amd.com	2023-06-05 13:09:19 +02:00