Commit graph

19 commits

Author SHA1 Message Date
Yuantian Tang
ac082ea87d arm64: dts: lx2160a: add more thermal zone support
There are 7 thermal zones in lx2160a soc. Add the
rest thermal zone node to enable them.
Also correct one of the values for tmu-calibration property.

Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-04-29 10:56:43 +08:00
Hou Zhiqiang
f93f1e721c arm64: dts: layerscape: add iommu-map property to pci nodes
Add the iommu-map property to the pci nodes so that the firmware
fixes it up with the required values thus enabling iommu for
devices connected over pci.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-03-11 16:15:48 +08:00
Hou Zhiqiang
b1ad0e7d45 arm64: dts: lx2160a: Add PCIe controller DT nodes
The LX2160A integrated 6 PCIe Gen4 controllers.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2020-02-24 09:25:52 +08:00
Russell King
5705b9dcda arm64: dts: lx2160a: add emdio2 node
Add a description for the emdio2 controller to the lx2160a dtsi file,
so we can use it in the SolidRun Clearfog CX platform.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-23 11:36:25 +08:00
Ioana Ciornei
6e1b8fae89 arm64: dts: lx2160a: add emdio1 node
Add the External MDIO1 device node found in the WRIOP global memory
region. This is needed for management of external PHYs.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-12-11 11:17:37 +08:00
Olof Johansson
17795bf9aa LX2160A TMU support for 5.5:
- Add TMU (Thermal Monitoring Unit) device node to enable thermal
    support on LX2160A SoC.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJdwYfpAAoJEFBXWFqHsHzOEuYH/jptqT0TA8u4x/HB74KZxDSn
 brX77UuDb2WAG1xqGNIUZwOtPy6TknrbhT+WtB+4w7gKUIH0pu5Oi1BWV1D2qvD9
 Ky+3fB4eSxqb72b6YWWyylt7pfDQ1iSt2CXmx1W+ZbBNX1Ku6jb9uNReC78FdT/n
 R+/gBu07EjGxYrOn5KyxWwxydsyPgRg0xW4H5Sp+ynzOFYTkWM8IM60ekz4667Yf
 RZdF5mG3hefuYH+d2DNrrQf9UB2rfK8ALUvkYfAQpqiTBBgBS9XIVnlHlC7IgdfA
 2ZCzYGenlA1HBD+XR6TCj7SwhoPEgpZiqiVP/eC6c0jHYOlaOB0wOnRbGbTi77w=
 =dD2j
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt64-tmu-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

LX2160A TMU support for 5.5:
 - Add TMU (Thermal Monitoring Unit) device node to enable thermal
   support on LX2160A SoC.

* tag 'imx-dt64-tmu-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: lx2160a: add tmu device node
  ARM: imx_v6_v7_defconfig: Enable CONFIG_DRM_MSM
  arm64: dts: imx8mn: Use correct clock for usdhc's ipg clk
  arm64: dts: imx8mm: Use correct clock for usdhc's ipg clk
  arm64: dts: imx8mq: Use correct clock for usdhc's ipg clk
  ARM: dts: imx7s: Correct GPT's ipg clock source
  ARM: dts: vf610-zii-scu4-aib: Specify 'i2c-mux-idle-disconnect'
  ARM: dts: imx6q-logicpd: Re-Enable SNVS power key
  arm64: dts: lx2160a: Correct CPU core idle state name
  arm64: dts: zii-ultra: fix ARM regulator states
  soc: imx: imx-scu: Getting UID from SCU should have response

Link: https://lore.kernel.org/r/20191105150315.15477-6-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2019-11-06 07:48:37 -08:00
Yuantian Tang
5363eaaeb8 arm64: dts: lx2160a: add tmu device node
Add the TMU (Thermal Monitoring Unit) device node to enable
TMU feature.

Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-28 21:46:53 +08:00
Ran Wang
07159f67c7 arm64: dts: lx2160a: Correct CPU core idle state name
lx2160a support PW15 but not PW20, correct name to avoid confusing.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Fixes: 00c5ce8ac0 ("arm64: dts: lx2160a: add cpu idle support")
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-14 14:00:53 +08:00
Russell King
62b4359c30 arm64: dts: mark lx2160a esdhc controllers dma coherent
The LX2160A esdhc controllers are setup by the driver to be DMA
coherent, but without marking them as such in DT, Linux thinks they
are not.  This can lead to random sporadic DMA errors, even to the
extent of preventing boot, such as:

mmc0: ADMA error
mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
mmc0: sdhci: Sys addr:  0x00000000 | Version:  0x00002202
mmc0: sdhci: Blk size:  0x00000008 | Blk cnt:  0x00000001
mmc0: sdhci: Argument:  0x00000000 | Trn mode: 0x00000013
mmc0: sdhci: Present:   0x01f50008 | Host ctl: 0x00000038
mmc0: sdhci: Power:     0x00000003 | Blk gap:  0x00000000
mmc0: sdhci: Wake-up:   0x00000000 | Clock:    0x000040d8
mmc0: sdhci: Timeout:   0x00000003 | Int stat: 0x00000001
mmc0: sdhci: Int enab:  0x037f108f | Sig enab: 0x037f108b
mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002202
mmc0: sdhci: Caps:      0x35fa0000 | Caps_1:   0x0000af00
mmc0: sdhci: Cmd:       0x0000333a | Max curr: 0x00000000
mmc0: sdhci: Resp[0]:   0x00000920 | Resp[1]:  0x001d8a33
mmc0: sdhci: Resp[2]:   0x325b5900 | Resp[3]:  0x3f400e00
mmc0: sdhci: Host ctl2: 0x00000000
mmc0: sdhci: ADMA Err:  0x00000009 | ADMA Ptr: 0x000000236d43820c
mmc0: sdhci: ============================================
mmc0: error -5 whilst initialising SD card

These are caused by the device's descriptor fetch hitting speculatively
loaded CPU cache lines that the CPU does not see through the normal,
non-cacheable DMA coherent mapping that it uses for non-coherent
devices.

DT and the device must agree wrt whether the device is DMA coherent or
not.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-10-07 20:41:30 +08:00
Chuanhua Han
7cb220a75f arm64: dts: lx2160a: Fix incorrect I2C clock divider
Lx2160a platform, the i2c input clock is actually platform pll CLK / 16
(this is the hardware connection), other clock divider can not get the
correct i2c clock, resulting in the output of SCL pin clock is not
accurate.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-19 16:04:50 +02:00
Ioana Ciornei
546d92d34f arm64: dts: add the console node for DPAA2 platforms
Add the console device tree node for the following
DPAA2 based platforms: LS1088A, LS2080A, LS2088A and LX2160A.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-08-03 12:28:20 +02:00
Yangbo Lu
fe844f1936 arm64: dts: fsl: add ptp timer node for dpaa2 platforms
This patch is to add ptp timer device tree node for dpaa2
platforms(ls1088a/ls208xa/lx2160a).

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2019-06-15 13:43:06 -07:00
Ran Wang
00c5ce8ac0 arm64: dts: lx2160a: add cpu idle support
lx2160a supports pw20 which could help save more power during cpu is
dile. It needs system firmware support via PSCI.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-22 10:40:45 +08:00
Peng Ma
071f785511 arm64: dts: lx2160a: add sata node support
Add SATA device nodes for fsl-lx2160a and enable support
for QDS and RDB boards.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-04-11 09:34:29 +08:00
Yogesh Narayan Gaur
1ffeef4eee arm64: dts: lx2160a: add FlexSPI node property
Add fspi node property for LX2160A SoC for FlexSPI driver.
Property added for the FlexSPI controller and for the connected
slave device for the LX2160ARDB target.
This is having two SPI-NOR flash device, mt35xu512aba, connected
at CS0 and CS1.

Signed-off-by: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-02-01 10:54:24 +08:00
Ioana Ciocoi Radulescu
0154878dec arm64: dts: lx2160a: Add dma-ranges property
Add missing property from the soc node in LX2160A dts.

Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-01-12 10:42:45 +08:00
Ioana Ciocoi Radulescu
703c5e40fd arm64: dts: lx2160a: Add fsl-mc node
Add the fsl-mc node in the LX2160A device tree.

Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-01-12 10:42:41 +08:00
Ran Wang
1000ae68e0 arm64: dts: layerscape: Add incr-burst-type-adjustment property to USB3 node
Add this property to all layerscape platforms to improve USB read write performance.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2019-01-12 09:41:53 +08:00
Vabhav Sharma
d548c217c6 arm64: dts: add QorIQ LX2160A SoC support
LX2160A SoC is based on Layerscape Chassis Generation 3.2 Architecture.

LX2160A features an advanced 16 64-bit ARM v8 CortexA72 processor cores
in 8 cluster, CCN508, GICv3,two 64-bit DDR4 memory controller, 8 I2C
controllers, 3 dspi, 2 esdhc,2 USB 3.0, mmu 500, 3 SATA, 4 PL011 SBSA
UARTs etc.

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@nxp.com>
Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Horia Geanta <horia.geanta@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-11-05 10:14:26 +08:00