Commit graph

3 commits

Author SHA1 Message Date
Stefan Popa
def914a4c3 iio: frequency: adf4371: Add support for output stage mute
Another feature of the ADF4371/ADF4372 is that the supply current to the
RF8P and RF8N output stage can shut down until the ADF4371 achieves lock
as measured by the digital lock detect circuitry. The mute to lock
detect bit (MUTE_LD) in REG25 enables this function.

Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2019-06-26 21:24:21 +01:00
Stefan Popa
84ed6482c6 dt-bindings: iio: frequency: Add ADF4372 PLL documentation
Document support for ADF4372 SPI Wideband Synthesizer.

Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2019-06-26 21:24:21 +01:00
Stefan Popa
4b65e3ba97 dt-bindings: iio: frequency: Add docs for ADF4371 PLL
Document support for Analog Devices ADF4371 SPI Wideband Synthesizer.

Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2019-06-17 21:06:45 +01:00