Commit graph

32 commits

Author SHA1 Message Date
Ahmad Fatoum
b19d3a55d4 ARM: dts: stm32: support child mfd cells for the stm32mp1 TAMP syscon
The stm32mp1 TAMP peripheral has 32 backup registers that survive
a warm reset. This makes them suitable for storing a reboot
mode, which the vendor's kernel tree is already doing[0].

The actual syscon-reboot-mode child node can be added by a board.dts or
fixed up by the bootloader. For the child node to be probed, the
compatible needs to include simple-mfd. The binding now specifies this,
so have the SoC dtsi adhere to it.

[0]: https://github.com/STMicroelectronics/linux/commit/2e9bfc29dd

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Arnaud Pouliquen
4c903a9464 ARM: dts: stm32: update stm32mp151 for remote proc synchronization support
Two backup registers are used to store the Cortex-M4 state and the resource
table address.
Declare the tamp node and add associated properties in m4_rproc node
to allow Linux to attach to a firmware loaded by the first boot stages.

Associated driver implementation is available in commit 9276536f45
("remoteproc: stm32: Parse syscon that will manage M4 synchronisation").

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Amelie Delaunay
d27209f04d ARM: dts: stm32: adjust USB OTG gadget fifo sizes in stm32mp151
Defaut use case on stm32mp151 USB OTG is ethernet gadget, using EP1 bulk
endpoint (MPS=512 bytes) and EP2 interrupt endpoint (MPS=16 bytes).
This patch optimizes USB OTG FIFO sizes accordingly.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Amelie Delaunay
e3b37ca311 ARM: dts: stm32: fix dmamux reg property on stm32mp151
Reg property length should cover all DMAMUX_CxCR registers.
DMAMUX_CxCR Address offset: 0x000 + 0x04 * x (x = 0 to 15), so latest
offset is at 0x3c, so length should be 0x40.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Amelie Delaunay
fc082d2bb2 ARM: dts: stm32: fix mdma1 clients channel priority level on stm32mp151
Update mdma1 clients channel priority level following stm32-mdma bindings.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Fabrice Gasnier
928caf877d ARM: dts: stm32: Add LP timer wakeup-source on stm32mp151
LP timer can be used to wakeup from stop mode on stm32mp151.
Add wakeup-source properties to all LP timer instances.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Fabrice Gasnier
f885fbca0f ARM: dts: stm32: Add LP timer irqs on stm32mp151
Add all LP timer irqs on stm32mp151.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Yann Gautier
08f07e9a19 ARM: dts: stm32: update sdmmc IP version for STM32MP15
Update the IP version to v2.0, which supports linked lists in internal DMA,
and is present in STM32MP1 SoCs.

The mmci driver supports the v2.0 periph id since 7a2a98be67 ("mmc: mmci:
Add support for sdmmc variant revision 2.0"), so it's now Ok to add it into
the SoC device tree to benefit from the improved DMA support.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Serge Semin
4f551b7bba ARM: dts: stm32: Harmonize EHCI/OHCI DT nodes name on stm32mp15
In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Amelie Delaunay <amelie.delaunay@st.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Hugues Fruchet
3e1f79e431 ARM: dts: stm32: fix DCMI DMA features on stm32mp15 family
Enable FIFO mode with half-full threshold.

Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-17 09:30:31 +01:00
Alexandre Torgue
71593c519f ARM: dts: stm32: add arm-pmu node on stm32mp15
Add arm-pmu node on stm32mp15.

Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Marek Vasut <marex@denx.de> # update to linux-next
Tested-by: Marek Vasut <marex@denx.de> # on DH PDK2 and Avenger96
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Christophe Kerello
fdcf9ea31c ARM: dts: stm32: add FMC2 EBI support for stm32mp157c
This patch adds FMC2 External Bus Interface support on stm32mp157c.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-09-23 18:37:02 +02:00
Benjamin Gaignard
a656ae15e9 ARM: dts: stm32: Add compatibles for syscon for stm32mp151
Syscon nodes needs at least 2 compatibles to be compliant why yaml documentation.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-07-21 10:39:11 +02:00
Benjamin Gaignard
e810e2d880 ARM: dts: stm32: Add missing #address and #size cells on spi node for stm32mp151
Add the missing #address-cells and #size-cells to spi node.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-06-15 11:46:10 +02:00
Etienne Carriere
7d4d46ba05 ARM: dts: stm32: bump PSCI to version 1.0 on stm32mp15x
Declare PSCI v1.0 support instead of v0.1 as the former is supported
by the PSCI firmware stacks stm32mp15x relies on.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-05-07 09:12:36 +02:00
Alain Volmat
ea6318dc5a ARM: dts: stm32: add Fast Mode Plus info in I2C nodes of stm32mp151
Add the syscfg-fmp property in each i2c node in order to allow
Fast Mode Plus speed if clock-frequency >= 1MHz is indicated.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-28 18:23:59 +02:00
Alain Volmat
06a933aaef ARM: dts: stm32: use st,stm32mp15-i2c compatible for stm32mp151
Replace previous st,stm32f7-i2c compatible with st,stm32mp15-i2c
for the platform stm32mp151.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-28 18:23:59 +02:00
Arnaud Pouliquen
dda8304316 ARM: dts: stm32: add cortex-M4 pdds management in Cortex-M4 node
Add declarations related to the syscon pdds for deep sleep management.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-28 17:14:07 +02:00
Ahmad Fatoum
9c32f980d9 ARM: dts: stm32: preset stm32mp15x video #address- and #size-cells
The cell count for address and size is defined by the binding and not
something a board would change. Avoid each board adding this
boilerplate by having the cell size specification in the SoC DTSI.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20 12:15:23 +02:00
Fabrice Gasnier
4bbb76eedd ARM: dts: stm32: fix a typo for DAC io-channel-cells on stm32mp15
Fix a typo on STM32MP15 DAC, e.g. s/channels/channel

Fixes: da6cddc7e8 ("ARM: dts: stm32: Add DAC support to stm32mp157c")

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-04-20 12:15:23 +02:00
Ahmad Fatoum
d6210da4f8 ARM: dts: stm32: add cpu clock-frequency property on stm32mp15x
All of the STM32MP151[1], STM32MP153[2] and STM32MP157[3] have their
Cortex-A7 cores running at 650 MHz.

Add the clock-frequency property to CPU nodes to avoid warnings about
them missing.

[1]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp151.html
[2]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp153.html
[3]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp157.html

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 17:03:06 +01:00
Alain Volmat
b65b6fc569 ARM: dts: stm32: add wakeup-source in all I2C nodes of stm32mp157c
Add the wakeup-source property in all i2c nodes of
the SoC stm32mp157c so that those I2C controllers can become
wakeup-source.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-03-13 16:11:12 +01:00
Amelie Delaunay
cc775a83db ARM: dts: stm32: add resets property on all DMA nodes on stm32mp151
resets property is well-managed in DMA drivers. In previous products,
there were no reset lines, that's why they are missing here in dma1, dma2,
dmamux and mdma nodes.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-02-10 17:46:08 +01:00
Amelie Delaunay
82ac8a81f9 ARM: dts: stm32: add USB OTG full support on stm32mp151
Using the st,stm32mp15-hsotg compatible allows to use USB OTG with Dual Role
mode support.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-02-10 17:40:17 +01:00
Marek Vasut
238086efd1 ARM: dts: stm32: Add missing ETHCK clock to ethernet node on stm32mp1
Add missing 'eth-ck' clock to the ethernet node on stm32mp1. These
clock are used to generate external clock signal for the PHY in case
'st,eth_ref_clk_sel' is specified.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Christophe ROULLIER <christophe.roullier@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-02-10 17:19:02 +01:00
Benjamin Gaignard
11ee8c7e44 ARM: dts: stm32: change nvmem node name on stm32mp1
Change non volatile node name from nvmem to efuse to be compliant
with yaml schema.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-01-09 12:29:28 +01:00
Arnaud Pouliquen
a09c71817f ARM: dts: stm32: update mlahb node according to the bindings on stm32mp15
Update of the mlahb node according to to DT bindings using json-schema

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-01-09 12:29:28 +01:00
Benjamin Gaignard
a0fc09abf4 ARM: dts: stm32: fix dma controller node name on stm32mp157c
Modify dma controller nodes name to fit with the standard naming.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-01-09 12:29:28 +01:00
Christophe Roullier
bf848759fb ARM: dts: stm32: Enable MAC TX clock gating during TX low-power mode on stm32mp15
When there is no activity on ethernet phy link, the ETH_GTX_CLK is cut.

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-12-09 14:58:24 +01:00
Christophe Roullier
33ce3e626c ARM: dts: stm32: remove syscfg clock on stm32mp15 ethernet
Syscfg is now activated automatically when syscfg registers are used.

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-12-09 14:41:42 +01:00
Alexandre Torgue
0eda69b6c5 ARM: dts: stm32: Manage security diversity for STM32M15x SOCs
This commit creates a new file to manage security diversity on STM32MP15x
SOCs. On STM32MP15xY, "Y" gives information:
 -Y = A means no cryp IP and no secure boot.
 -Y = C means cryp IP + secure boot.

Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-12-09 09:19:15 +01:00
Alexandre Torgue
95e395c881 ARM: dts: stm32: Introduce new STM32MP15 SOCs: STM32MP151 and STM32MP153
STM32MP151 and STM32MP153 were not explicitly supported through
stm32mp157c.dts. This commit adds dedicated files to support all STM32MP15
SOCs family.

The differences between those SOCs are:
 -STM32MP151 [1]: common file.
 -STM32MP153 [2]: STM32MP151 + CANs + a second CortexA7-CPU.
 -STM32MP157 [3]: STM32MP153 + DSI + GPU.

[1] https://www.st.com/resource/en/reference_manual/dm00366349.pdf
[2] https://www.st.com/resource/en/reference_manual/dm00366355.pdf
[3] https://www.st.com/resource/en/reference_manual/dm00327659.pdf

Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2019-12-09 09:19:15 +01:00
Renamed from arch/arm/boot/dts/stm32mp157c.dtsi (Browse further)