2 commits

Author	SHA1	Message	Date
Ben Skeggs	76b8f81a5b	drm/nouveau: improve handling of 64-bit BARs ... GPUs exist now with a 64-bit BAR0, which mean that BAR1 and BAR2's indices (as passed to pci_resource_len() etc) are bumped up by one. Modify nvkm_device.resource_addr/size() to take an enum instead of an integer bar index, and take IORESOURCE_MEM_64 into account when translating to the "raw" bar id. [airlied: fixup ERR_PTR] Signed-off-by: Ben Skeggs <bskeggs@nvidia.com> Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Timur Tabi <ttabi@nvidia.com> Tested-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Dave Airlie <airlied@redhat.com>	2025-05-19 07:14:35 +10:00
Ben Skeggs	58c3d3c837	drm/nouveau/vfn: move NV_USERMODE class from host ... - uses proper class IDs for Turing/Ampere Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>	2022-11-09 10:44:36 +10:00

Renamed from drivers/gpu/drm/nouveau/nvkm/engine/fifo/usergv100.c (Browse further)