Commit graph

22 commits

Author SHA1 Message Date
Ben Skeggs
61671d85de drm/nouveau/kms: remove push pointer from nv50_dmac
The struct itself lives in nv50_dmac already, just use that.

Signed-off-by: Ben Skeggs <bskeggs@nvidia.com>
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240726043828.58966-38-bskeggs@nvidia.com
2024-07-27 03:05:51 +02:00
Lyude Paul
79af598a5b drm/nouveau/kms/nv50-: Always validate LUTs in nv50_head_atomic_check_lut()
When it comes to gamma or degamma luts, nouveau will actually skip the
calculation of certain LUTs depending on the head and plane states. For
instance, when the head is disabled we don't perform any error checking on
the gamma LUT, and likewise if no planes are present and enabled in our
atomic state we will skip error checking the degamma LUT. This is a bit of
a problem though, since the per-head gamma and degamma props in DRM can be
changed even while a head is disabled - a situation which can be triggered
by the igt testcase mentioned down below.

Originally I thought this was a bit silly and was tempted to just fix the
igt test to only set gamma/degamma with the head enabled. After a bit of
thinking though I realized we should fix this in nouveau. This is because
if a program decides to set an invalid LUT for a head before enabling the
head, such a property change would succeed while also making it impossible
to turn the head back on until the LUT is removed or corrected - something
that could be painful for a user to figure out.

So, fix this checking both degamma and gamma LUTs unconditionally during
atomic checks. We start by calling nv50_head_atomic_check_lut() regardless
of whether the head is active or not in nv50_head_atomic_check(). Then we
move the ilut error checking into nv50_head_atomic_check_lut() and add a
per-head hook for it, primarily because as a per-CRTC property DRM we want
the LUT to be error checked by the head any time it's included in an atomic
state. Of course though, actual programming of the degamma lut to hardware
is still handled in each plane's atomic check and commit.

Signed-off-by: Lyude Paul <lyude@redhat.com>
Testcase: igt/kms_color/pipe-invalid-*-lut-sizes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Link: https://gitlab.freedesktop.org/drm/nouveau/-/merge_requests/10
2021-11-12 23:46:04 +01:00
Ben Skeggs
f844eb485e drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw image_set()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:00 +10:00
Ben Skeggs
66f7b7bddf drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw xlut_clr()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:00 +10:00
Ben Skeggs
6833d2a0c7 drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw xlut_set()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:51:00 +10:00
Ben Skeggs
2740edb3c6 drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw csc_clr()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:59 +10:00
Ben Skeggs
84e1d06b06 drm/nouveau/kms/nv50-: use NVIDIA's headers for wndw csc_set()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:59 +10:00
Ben Skeggs
6d6e11e284 drm/nouveau/kms/nv50-: convert wndw image_set() to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:53 +10:00
Ben Skeggs
34838908f6 drm/nouveau/kms/nv50-: convert wndw xlut_clr() to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:53 +10:00
Ben Skeggs
222439ebe6 drm/nouveau/kms/nv50-: convert wndw xlut_set() to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:53 +10:00
Ben Skeggs
cfb4120dae drm/nouveau/kms/nv50-: convert wndw csc_clr() to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:52 +10:00
Ben Skeggs
72587dca96 drm/nouveau/kms/nv50-: convert wndw csc_set() to new push macros
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24 18:50:52 +10:00
Ilia Mirkin
131992709d drm/nouveau/kms/gf119-: allow both 256- and 1024-sized LUTs to be used
The hardware supports either size. Also add checks to ensure that only
these two sizes may be used for supplying a LUT.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15 10:49:58 +10:00
Ben Skeggs
dffa487822 drm/nouveau/kms/gv100-: implement csc + enable modern colour managment properties
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23 12:55:32 +10:00
Ilia Mirkin
88b703527b drm/nouveau/kms/gf119-: add ctm property support
This adds support on GF119:GV100 (exclusive) for CTM (aka CSC).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2019-08-23 12:55:32 +10:00
Ben Skeggs
cb55cd0c66 drm/nouveau/kms/nv50-: allow more flexibility with lut formats
Will be required for Turing.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:49 +10:00
Ben Skeggs
88b600d421 drm/nouveau/kms/gk104-: add support for [XA]2R10G10B10 formats
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:30 +10:00
Ben Skeggs
b05d873808 drm/nouveau/kms/nv50-: separate blocklinear vs linear pitch
Will be required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:30 +10:00
Ben Skeggs
119608a7f3 drm/nouveau/kms/nv50-: handle degamma LUT from window channels
Required to eventually support DRM colour management APIs, and to
support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:29 +10:00
Ben Skeggs
53e0a3e70d drm/nouveau/kms/nv50-: simplify tracking of channel interlocks
Instead of windows returning their core channel interlock mask if they
know core has been modified, it's recorded unconditionally and used if
required when update methods are emitted.

This will be required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:29 +10:00
Ben Skeggs
261fcfa969 drm/nouveau/kms/nv50-: extend window image data for stereo/planar formats
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:29 +10:00
Ben Skeggs
ccd27db8c7 drm/nouveau/kms/nv50-: split base implementation by hardware class
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:28 +10:00