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4 commits

Author SHA1 Message Date
Bartosz Golaszewski
1fd7d21095 gpio: npcm-sgpio: don't use legacy GPIO chip setters 
We've converted this driver to using the new GPIO line value setters but
missed the instance where the legacy callback is accessed directly using
the function pointer. This will lead to a NULL-pointer dereference as
this pointer is no longer populated. Fix it.

Fixes: 0e1a8930c9 ("gpio: npcm-sgpio: use new GPIO line value setter callbacks")
Link: https://lore.kernel.org/r/20250618-gpio-mmio-fix-setter-v1-1-2578ffb77019@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
 2025-06-19 09:13:44 +02:00
Bartosz Golaszewski
0e1a8930c9 gpio: npcm-sgpio: use new GPIO line value setter callbacks 
struct gpio_chip now has callbacks for setting line values that return
an integer, allowing to indicate failures. Convert the driver to using
them.

Link: https://lore.kernel.org/r/20250610-gpiochip-set-rv-gpio-v1-9-3a9a3c1472ff@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
 2025-06-17 11:09:31 +02:00
Jim Liu
7f45fe2ea3 gpio: nuvoton: Fix sgpio irq handle error 
The generic_handle_domain_irq() function calls irq_resolve_mapping().
Thus delete a duplicative irq_find_mapping() call
so that a stack trace and an RCU stall will be avoided.

Fixes: c4f8457d17 ("gpio: nuvoton: Add Nuvoton NPCM sgpio driver")
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
Link: https://lore.kernel.org/r/20240506064244.1645922-1-JJLIU0@nuvoton.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
 2024-05-07 09:44:33 +02:00
Jim Liu
c4f8457d17 gpio: nuvoton: Add Nuvoton NPCM sgpio driver 
Add Nuvoton BMC NPCM7xx/NPCM8xx sgpio driver support.
Nuvoton NPCM SGPIO module is combine serial to parallel IC (HC595)
and parallel to serial IC (HC165), and use APB3 clock to control it.
This interface has 4 pins  (D_out , D_in, S_CLK, LDSH).
BMC can use this driver to increase 64 GPI pins and 64 GPO pins to use.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
 2024-01-03 11:25:41 +01:00