Commit graph

8 commits

Author SHA1 Message Date
Bjorn Helgaas
264200cc3a
clk: Fix typos
Fix typos, mostly in comments except CLKGATE_SEPERATED_* (definition and
uses updated).

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250723203819.2910289-1-helgaas@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-07-26 23:49:18 -07:00
Changhuang Liang
838c0a41d7 clk: starfive: Make _clk_get become a common helper function
Introduce num_reg to store the number of clocks, this helps to make
_clk_get become a common helper function which called jh71x0_clk_get().
With this, it helps to simplify the code and extend the code in the
future.

Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Link: https://lore.kernel.org/r/20250114081300.36600-1-changhuang.liang@starfivetech.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-01-14 10:55:00 -08:00
Xingyu Wu
538d5477b2 clk: starfive: jh7110-sys: Add notifier for PLL0 clock
Add notifier function for PLL0 clock. In the function, the cpu_root clock
should be operated by saving its current parent and setting a new safe
parent (osc clock) before setting the PLL0 clock rate. After setting PLL0
rate, it should be switched back to the original parent clock.

Fixes: e2c510d6d6 ("riscv: dts: starfive: Add cpu scaling for JH7110 SoC")
Cc: stable@vger.kernel.org
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Link: https://lore.kernel.org/r/20240826080430.179788-2-xingyu.wu@starfivetech.com
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Tested-by: Michael Jeanson <mjeanson@efficios.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-08-29 12:24:42 -07:00
Emil Renner Berthing
a242b2051b clk: starfive: Add flags argument to JH71X0__MUX macro
This flag is needed to add the CLK_SET_RATE_PARENT flag on the gmac_tx
clock on the JH7100, which in turn is needed by the dwmac-starfive
driver to set the clock properly for 1000, 100 and 10 Mbps links.

This change was mostly made using coccinelle:

@ match @
expression idx, name, nparents;
@@
 JH71X0__MUX(
-idx, name, nparents,
+idx, name, 0, nparents,
 ...)

Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Link: https://lore.kernel.org/r/20231219232442.2460166-2-cristian.ciocaltea@collabora.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2024-01-03 15:51:55 -08:00
Xingyu Wu
a013e98187 clk: starfive: jh7110-sys: Add PLL clocks source from DTS
Modify PLL clocks source to be got from DTS or
the fixed factor clocks.

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-07-19 18:08:00 +01:00
Hal Feng
c19d966e11 clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers
The dev_set_drvdata() is no longer needed after we used a wrapper
struct to get the data in auxiliary driver.

Cc: Xingyu Wu <xingyu.wu@starfivetech.com>
Fixes: d1aae06630 ("clk: starfive: Avoid casting iomem pointers")
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Link: https://lore.kernel.org/r/20230417074115.30786-3-hal.feng@starfivetech.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-04-17 18:14:10 -07:00
Stephen Boyd
d1aae06630 clk: starfive: Avoid casting iomem pointers
Let's use a wrapper struct for the auxiliary_device made in
jh7110_reset_controller_register() so that we can stop casting iomem
pointers. The casts trip up tools like sparse, and make for some awkward
casts that are largely unnecessary. While we're here, change the
allocation from devm and actually free the auxiliary_device memory in
the release function. This avoids any use after free problems where the
parent device driver is unbound from the device but the
auxiliuary_device is still in use accessing devm freed memory.

Cc: Tommaso Merciai <tomm.merciai@gmail.com>
Cc: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Cc: Hal Feng <hal.feng@starfivetech.com>
Cc: Conor Dooley <conor.dooley@microchip.com>
Cc: Xingyu Wu <xingyu.wu@starfivetech.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Fixes: edab7204af ("clk: starfive: Add StarFive JH7110 system clock driver")
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20230413205528.4044216-1-sboyd@kernel.org
2023-04-13 15:45:46 -07:00
Emil Renner Berthing
edab7204af clk: starfive: Add StarFive JH7110 system clock driver
Add driver for the StarFive JH7110 system clock controller and
register an auxiliary device for system reset controller which
is named as "rst-sys".

Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Co-developed-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-05 15:44:12 +01:00