Commit graph

61 commits

Author SHA1 Message Date
Jerome Brunet
14bd7b9c8d clk: meson: only one loop index is necessary in probe
We don't need several loop index variables in the probe function
This is far from being critical but since we are doing a vast
rework of meson clock controllers, now is the time to lower the
entropy a bit

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-03-13 10:03:57 +01:00
Jerome Brunet
332b32a232 clk: meson: use devm_of_clk_add_hw_provider
There is no remove callbacks in meson's clock controllers and
of_clk_del_provider is never called if of_clk_add_hw_provider has been
executed, introducing a potential memory leak.
Fixing this by the using the devm variant.

In reality, the leak would never happen since these controllers are
never unloaded once in use ... still, this is worth cleaning.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-03-13 10:03:57 +01:00
Jerome Brunet
323346d31d clk: meson: use dev pointer where possible
The 'dev' pointer is directly available in gxbb and axg clock
controller, so consistently use it instead of going the through the
'pdev' pointer once in while

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-03-13 10:03:56 +01:00
Jerome Brunet
6c00e7b760 clk: meson: add axg misc bit to the mpll driver
On axg, the rate of the mpll is stuck as if sdm value was 4 and could not
change (expect for mpll2 strangely). Looking at the vendor kernel, it
turns out a new magic bit from the undocumented HHI_PLL_TOP_MISC register
is required.

Setting this bit solves the problem and the mpll rates are back to normal

Fixes: 78b4af312f ("clk: meson-axg: add clock controller drivers")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2018-02-12 09:49:23 +01:00
Yixun Lan
2fa9b361e5 clk: meson: axg: fix the od shift of the sys_pll
According to the datasheet, the od shift of sys_pll is actually 16.

Fixes: 78b4af312f ('clk: meson-axg: add clock controller drivers')
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
[fixed commit message]
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2018-02-12 09:49:23 +01:00
Jerome Brunet
6b71aceceb clk: meson: axg: add the fractional part of the fixed_pll
The fixed_pll also has a fractional part. On axg s400 board, without
this parameter, the calculated rate is off by ~8Mhz (0,4%). The fixed_pll
being the root of the peripheral clock tree, this error is propagated to
the rest of the clocks

Adding the definition of the parameter fixes the problem

Fixes: 78b4af312f ("clk: meson-axg: add clock controller drivers")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2018-02-12 09:49:23 +01:00
Jerome Brunet
4ed98e9572 clk: meson: remove useless pll rate params tables
Read-only plls don't need param table to recalculate the rate.
Providing them with a param table is just a waste of memory.

Remove the useless tables from sys_pll on gxbb and axg.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2018-02-12 09:49:22 +01:00
weiyongjun (A)
9d548d8038 clk: meson-axg: fix potential NULL dereference in axg_clkc_probe()
platform_get_resource() may return NULL, add proper
check to avoid potential NULL dereferencing.

This is detected by Coccinelle semantic patch.

@@
expression pdev, res, n, t, e, e1, e2;
@@

res = platform_get_resource(pdev, t, n);
+ if (!res)
+   return -EINVAL;
... when != res == NULL
e = devm_ioremap(e1, res->start, e2);

Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2018-01-10 13:24:36 -08:00
weiyongjun (A)
65e01ae3f2 clk: meson-axg: make local symbol axg_gp0_params_table static
Fixes the following sparse warning:

drivers/clk/meson/axg.c:260:25: warning:
 symbol 'axg_gp0_params_table' was not declared. Should it be static?

Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-28 10:42:07 -08:00
weiyongjun (A)
4f8f7809e4 clk: meson-axg: fix return value check in axg_clkc_probe()
In case of error, the function devm_ioremap() returns NULL pointer
not ERR_PTR(). The IS_ERR() test in the return value check should be
replaced with NULL test.

Fixes: 78b4af312f ("clk: meson-axg: add clock controller drivers")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-28 10:42:05 -08:00
Qiufang Dai
78b4af312f clk: meson-axg: add clock controller drivers
Add clock controller drivers for Amlogic Meson-AXG SoC.

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-12-14 10:19:37 +01:00