Niravkumar L Rabara
17d321d4a0
arm64: dts: socfpga: agilex5: add led and memory nodes
...
Add LED and memory nodes, and enabled GPIO0 for Agilex5 devkit.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2025-03-26 06:47:04 -05:00
Niravkumar L Rabara
a63766f32d
arm64: dts: socfpga: agilex5: add qspi flash node
...
Add Micron qspi nor flash node for Intel SoCFPGA Agilex5.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2025-03-26 06:47:04 -05:00
Niravkumar L Rabara
2d599bc438
arm64: dts: agilex5: add initial support for Intel Agilex5 SoCFPGA
...
Add the initial device tree files for Intel Agilex5 SoCFPGA platform.
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2023-08-14 05:33:41 -05:00
