Commit graph

32 commits

Author SHA1 Message Date
Haibo Chen
40567fa4ef arm64: dts: add ngpios for vf610 compatible gpio controllers
After commit da5dd31efd ("gpio: vf610: Switch to gpio-mmio"),
the vf610 GPIO driver no longer uses the static number 32 for
gc->ngpio. This allows users to configure the number of GPIOs
per port.

And some gpio controllers did have less pads. So add 'ngpios' here,
this can save some memory when request bitmap, and also show user
more accurate information when use gpio tools.

Besides, some gpio controllers have hole in the gpio ranges, so use
'gpio-reserved-ranges' to cover that, then the gpioinfo tool show the
correct result.

Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Stefan Wahren <wahrenst@gmx.net>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-06-19 11:49:13 +08:00
Linus Torvalds
9c39d5ab45 soc: devicetree updates for 6.13
This release adds the devicetree files for an impressive number of new
 SoC variants, though as expected these are all related to others we
 already support:
 
  - The microchip sam9x7 devicetree is now added, after the device driver
    and platform code has already made it in. This is likely the last ARMv5
    (!)  platform to ever get added, updating the 20+ year old at91/sam9
    platform wtih DDR3 memory and gigabit ethernet.
 
  - On the Apple platform, there are now devicetree files for a number of
    A-series SoCs in addition to the M-series ones, these are used
    primarily in phones and tablets, but are closely related to the
    already supported chips.
 
  - Samsung Exynos 8895 and Exynos 990 are more phone SoCs used in older
    Samsung Galaxy phones.
 
  - Qualcomm Snapdragon 778G (SM7325) is another phone SoC, closely related
    to the Snapdragon 7c+ Gen 3 (SC7280) used in low-end laptops.
 
  - Rockchip RK3528 and RK3576 are new variants of their TV box and Tablet
    chips, still using the older ARMv8.0 cores from RK3328/RK3399 but
    with a newer process and other improvements from the RK35xx (otherwise
    ARMv8.2) chips.  RK3566T and RK3399-S are also added, these are just
    lower-cost versions of their normal counterparts.
 
  - TI J742S2 is a feature-reduced version of the J784s4
    industrial/automotive SoC, with fewer CPU cores.
 
  - Sophgo SG2002 is an embedded SoC with one RISC-V (C906) and one ARM
    (Cortex-A53) core, at this point support is only added for running
    on the RISC-V side on the LicheeRV Nano board.
 
 A total of 92 new .dts files describing individual machines is added,
 which must be a new record. The majority of these is for the newly added
 chips above, notably all the Apple phones and tablets.  The other new
 machines include nine industrial/embedded boards with NXP i.MX6 or i.MX8
 SoCs, eight for Rockchips RK35XX and one or two each for Rockchips RV1109,
 RK3308, Allwinner A33, Tegra 234, Qualcomm qcs9100/sc8280xp/x1e80100,
 TI AM625 and Starfive JH7110.
 
 As usual there are also many newlyad added features in existing boards
 as well as cleanups and minor bugfixes.
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Merge tag 'soc-dt-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC devicetree updates from Arnd Bergmann:
 "This release adds the devicetree files for an impressive number of new
  SoC variants, though as expected these are all related to others we
  already support:

   - The microchip sam9x7 devicetree is now added, after the device
     driver and platform code has already made it in. This is likely the
     last ARMv5 (!) platform to ever get added, updating the 20+ year
     old at91/sam9 platform with DDR3 memory and gigabit ethernet.

   - On the Apple platform, there are now devicetree files for a number
     of A-series SoCs in addition to the M-series ones, these are used
     primarily in phones and tablets, but are closely related to the
     already supported chips.

   - Samsung Exynos 8895 and Exynos 990 are more phone SoCs used in
     older Samsung Galaxy phones.

   - Qualcomm Snapdragon 778G (SM7325) is another phone SoC, closely
     related to the Snapdragon 7c+ Gen 3 (SC7280) used in low-end
     laptops.

   - Rockchip RK3528 and RK3576 are new variants of their TV box and
     Tablet chips, still using the older ARMv8.0 cores from
     RK3328/RK3399 but with a newer process and other improvements from
     the RK35xx (otherwise ARMv8.2) chips. RK3566T and RK3399-S are also
     added, these are just lower-cost versions of their normal
     counterparts.

   - TI J742S2 is a feature-reduced version of the J784s4
     industrial/automotive SoC, with fewer CPU cores.

   - Sophgo SG2002 is an embedded SoC with one RISC-V (C906) and one ARM
     (Cortex-A53) core, at this point support is only added for running
     on the RISC-V side on the LicheeRV Nano board.

  A total of 92 new .dts files describing individual machines is added,
  which must be a new record. The majority of these is for the newly
  added chips above, notably all the Apple phones and tablets. The other
  new machines include nine industrial/embedded boards with NXP i.MX6 or
  i.MX8 SoCs, eight for Rockchips RK35XX and one or two each for
  Rockchips RV1109, RK3308, Allwinner A33, Tegra 234, Qualcomm
  qcs9100/sc8280xp/x1e80100, TI AM625 and Starfive JH7110.

  As usual there are also many newly added features in existing boards
  as well as cleanups and minor bugfixes"

* tag 'soc-dt-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (718 commits)
  arm64: dts: apm: Remove unused and undocumented "bus_num" property
  arm: dts: spear13xx: Remove unused and undocumented "pl022,slave-tx-disable" property
  arm64: dts: amd: Remove unused and undocumented "amd,zlib-support" property
  arm64: dts: lg131x: Update spi clock properties
  arm64: dts: seattle: Update spi clock properties
  arm64: dts: rockchip: use less broad pinctrl for pcie3x1 on Radxa E25
  arm64: dts: rockchip: add Radxa ROCK 5C
  dt-bindings: arm: rockchip: add Radxa ROCK 5C
  arm64: dts: rockchip: orangepi-5-plus: Enable GPU
  arm64: dts: rockchip: enable USB3 on NanoPC-T6
  arm64: dts: rockchip: adapt regulator nodenames to preferred form
  arm64: dts: rockchip: Enable HDMI display for rk3588 Cool Pi GenBook
  arm64: dts: rockchip: Enable HDMI display for rk3588 Cool Pi 4B
  arm64: dts: rockchip: Enable HDMI0 for rk3588 Cool Pi CM5 EVB
  arm64: dts: rockchip: Enable HDMI on NanoPi R6C/R6S
  arm64: dts: rockchip: Enable GPU on NanoPi R6C/R6S
  arm64: dts: rockchip: Enable HDMI on Hardkernel ODROID-M2
  arm64: dts: rockchip: Remove non-removable flag from sdmmc on rk3576-sige5
  arm64: dts: allwinner: a100: perf1: Add eMMC and MMC node
  arm64: dts: allwinner: pinephone: Add mount matrix to accelerometer
  ...
2024-11-20 15:26:46 -08:00
Shengjiu Wang
28879c0c09 arm64: dts: imx8ulp: Add audio device nodes
Add edma1, sai4, sai5 device nodes bus of in per_bridge3.
Add edma2, sai6, sai7, spdif device nodes in bus of
per_bridge5.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-04 16:46:31 +08:00
Carlos Song
226e393305 arm64: dts: imx8ulp: Add LPSPI alias
Add i.MX8ULP LPSPI alias for kernel LPSPI driver usage.

Signed-off-by: Carlos Song <carlos.song@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-11-01 16:14:21 +08:00
Haibo Chen
409dc5196d arm64: dts: imx8ulp: correct the flexspi compatible string
The flexspi on imx8ulp only has 16 LUTs, and imx8mm flexspi has
32 LUTs, so correct the compatible string here, otherwise will
meet below error:

[    1.119072] ------------[ cut here ]------------
[    1.123926] WARNING: CPU: 0 PID: 1 at drivers/spi/spi-nxp-fspi.c:855 nxp_fspi_exec_op+0xb04/0xb64
[    1.133239] Modules linked in:
[    1.136448] CPU: 0 UID: 0 PID: 1 Comm: swapper/0 Not tainted 6.11.0-rc6-next-20240902-00001-g131bf9439dd9 #69
[    1.146821] Hardware name: NXP i.MX8ULP EVK (DT)
[    1.151647] pstate: 40000005 (nZcv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[    1.158931] pc : nxp_fspi_exec_op+0xb04/0xb64
[    1.163496] lr : nxp_fspi_exec_op+0xa34/0xb64
[    1.168060] sp : ffff80008002b2a0
[    1.171526] x29: ffff80008002b2d0 x28: 0000000000000000 x27: 0000000000000000
[    1.179002] x26: ffff2eb645542580 x25: ffff800080610014 x24: ffff800080610000
[    1.186480] x23: ffff2eb645548080 x22: 0000000000000006 x21: ffff2eb6455425e0
[    1.193956] x20: 0000000000000000 x19: ffff80008002b5e0 x18: ffffffffffffffff
[    1.201432] x17: ffff2eb644467508 x16: 0000000000000138 x15: 0000000000000002
[    1.208907] x14: 0000000000000000 x13: ffff2eb6400d8080 x12: 00000000ffffff00
[    1.216378] x11: 0000000000000000 x10: ffff2eb6400d8080 x9 : ffff2eb697adca80
[    1.223850] x8 : ffff2eb697ad3cc0 x7 : 0000000100000000 x6 : 0000000000000001
[    1.231324] x5 : 0000000000000000 x4 : 0000000000000000 x3 : 00000000000007a6
[    1.238795] x2 : 0000000000000000 x1 : 00000000000001ce x0 : 00000000ffffff92
[    1.246267] Call trace:
[    1.248824]  nxp_fspi_exec_op+0xb04/0xb64
[    1.253031]  spi_mem_exec_op+0x3a0/0x430
[    1.257139]  spi_nor_read_id+0x80/0xcc
[    1.261065]  spi_nor_scan+0x1ec/0xf10
[    1.264901]  spi_nor_probe+0x108/0x2fc
[    1.268828]  spi_mem_probe+0x6c/0xbc
[    1.272574]  spi_probe+0x84/0xe4
[    1.275958]  really_probe+0xbc/0x29c
[    1.279713]  __driver_probe_device+0x78/0x12c
[    1.284277]  driver_probe_device+0xd8/0x15c
[    1.288660]  __device_attach_driver+0xb8/0x134
[    1.293316]  bus_for_each_drv+0x88/0xe8
[    1.297337]  __device_attach+0xa0/0x190
[    1.301353]  device_initial_probe+0x14/0x20
[    1.305734]  bus_probe_device+0xac/0xb0
[    1.309752]  device_add+0x5d0/0x790
[    1.313408]  __spi_add_device+0x134/0x204
[    1.317606]  of_register_spi_device+0x3b4/0x590
[    1.322348]  spi_register_controller+0x47c/0x754
[    1.327181]  devm_spi_register_controller+0x4c/0xa4
[    1.332289]  nxp_fspi_probe+0x1cc/0x2b0
[    1.336307]  platform_probe+0x68/0xc4
[    1.340145]  really_probe+0xbc/0x29c
[    1.343893]  __driver_probe_device+0x78/0x12c
[    1.348457]  driver_probe_device+0xd8/0x15c
[    1.352838]  __driver_attach+0x90/0x19c
[    1.356857]  bus_for_each_dev+0x7c/0xdc
[    1.360877]  driver_attach+0x24/0x30
[    1.364624]  bus_add_driver+0xe4/0x208
[    1.368552]  driver_register+0x5c/0x124
[    1.372573]  __platform_driver_register+0x28/0x34
[    1.377497]  nxp_fspi_driver_init+0x1c/0x28
[    1.381888]  do_one_initcall+0x80/0x1c8
[    1.385908]  kernel_init_freeable+0x1c4/0x28c
[    1.390472]  kernel_init+0x20/0x1d8
[    1.394138]  ret_from_fork+0x10/0x20
[    1.397885] ---[ end trace 0000000000000000 ]---
[    1.407908] ------------[ cut here ]------------

Fixes: ef89fd56bd ("arm64: dts: imx8ulp: add flexspi node")
Cc: stable@kernel.org
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-10-16 12:04:52 +08:00
Pankaj Gupta
e6b73eb23f arm64: dts: imx8ulp: add caam jr
Add crypto node in device tree for:
- CAAM job-ring

Signed-off-by: Varun Sethi <v.sethi@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-04-22 12:56:37 +08:00
Xu Yang
95049bf5e6 arm64: dts: imx8ulp: add usb nodes
Add USB nodes on i.MX8ULP platform which has 2 USB controllers.

Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2024-04-22 11:49:35 +08:00
Haibo Chen
8ae06f1366 arm64: dts: imx8ulp: update gpio node name to align with register address
Change the gpio node name to align with register address.

Fixes: ac7bcf48dd ("arm64: dts: imx8ulp: update gpio node")
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-12-06 13:24:25 +08:00
Peng Fan
ac7bcf48dd arm64: dts: imx8ulp: update gpio node
The i.MX8ULP GPIO supports two interrupts and one register base,
the current fsl,imx7ulp-gpio compatible could work for i.MX8ULP in
gpio-vf610.c driver, it is based on the base address are splited
into two with offset added in device tree node. Now following
hardware design, using one register base in device tree node.

This may break users who use compatible fsl,imx7ulp-gpio to enable
i.MX8ULP GPIO.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:00 +08:00
Fabio Estevam
43211f6232 arm64: dts: imx8ulp: Fix the SPI clock-names order
spi-nxp-fspi.yaml expects the clock-names entries to be in
the following order: "fspi_en", "fspi".

Change it accordingly to fix the following schema warnings:

imx8ulp-evk.dtb: spi@29810000: clock-names:0: 'fspi_en' was expected
	from schema $id: http://devicetree.org/schemas/spi/spi-nxp-fspi.yaml#
imx8ulp-evk.dtb: spi@29810000: clock-names:1: 'fspi' was expected
	from schema $id: http://devicetree.org/schemas/spi/spi-nxp-fspi.yaml#

Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-09-25 09:46:31 +08:00
Haibo Chen
ef89fd56bd arm64: dts: imx8ulp: add flexspi node
Add flexspi node, flexspi has a special memory region mapped to
0x60000000~0x6fffffff. This region is for AHB usage. So add this region
to SoC ranges.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-07-30 21:19:04 +08:00
Peng Fan
db2c35aa68 arm64: dts: imx8ulp: add cpuidle node
Add cpuidle node and enable cpuidle for dual cores. The HW mode in
Arm Trusted Firmware is SoC Application Power Domain Sleep mode.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-07-30 21:19:02 +08:00
Peng Fan
a9624b4e7e arm64: dts: imx8ulp: add thermal node
Add thermal node. Cooling map is not added, because frequency runtime
changing not supported for now.

Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-07-30 21:18:59 +08:00
Peng Fan
9780340751 arm64: dts: imx8ulp: set default clock for SDHC
Set default clock rate and parents for SDHC[0,1,2].

The PLL3 PFD2 maximum frequency is 332Mhz, we can't set it to 389Mhz
as USDHC clock parent. Because PLL3 PFD0 is used for NIC, PFD1 is used
for audio, the only choice is PFD3 which can reach to 400Mhz.

USDHC1 and USDHC2 maximum PCC clock rate is 200Mhz in Over Drive mode,
and 100Mhz in Nominal/Low Drive mode, when PTE or PTF is used.

The patch adjusts clock parent to PLL3 PFD3 DIV1 for USDHC0, PLL3
PFD3 DIV2 for USDHC1 and USDHC2. And set the max rate to meet
restrictions.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-07-30 21:18:56 +08:00
Peng Fan
5b9435d646 arm64: dts: imx8ulp: add cm33 node
Add i.MX8ULP CM33 node.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-07-30 21:18:46 +08:00
Krzysztof Kozlowski
d2bd947176 arm64: dts: imx: add missing cache properties
As all level 2 and level 3 caches are unified, add required
cache-unified properties to fix warnings like:

  imx8dxl-evk.dtb: l2-cache0: 'cache-unified' is a required property

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-05-14 11:52:28 +08:00
Pierre Gondois
3b450831e5 arm64: dts: Update cache properties for freescale
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).

Update the Device Trees accordingly.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Chester Lin <clin@suse.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-11-15 08:29:35 +08:00
Linus Torvalds
7171a8da00 ARM: devicetree updates for 6.1
Most of the changes fall into one of three categories: adding support
 for additional devices on existing machines, cleaning up issues found
 by the ongoing conversion to machine-readable bindings, and addressing
 minor mistakes in the existing DT data.
 
 Across SoC vendors, Qualcomm and Freescale stick out as getting the most
 updates, which corresponds to their dominance in the mobile phone and
 embedded industrial markets, respectively.
 
 There are 636 non-merge changeset in this branch, which is a little
 lower than most times, but more importantly we only add 36 machine
 files, which is about half of what we had the past few releases.
 
 Eight new SoCs are added, but all of them are variations of already
 supported SoC families, and most of them come with one reference board
 design from the SoC vendor:
 
  - Mediatek MT8186 is a Chromebook/Tablet type SoC, similar to the
    MT65xx series of phone SoCs, with two Cortex-A76 and six Cortex-A55
    cores.
 
  - TI AM62A is another member of the K3 family with Cortex-A53 cores,
    this one is targetted at Video/Vision processing for industrial
    and automotive applications.
 
  - NXP i.MX8DXL is another chip for this market in the ever-growing
    i.MX8 family, this one again with two Cortex-A35 cores.
 
  - Renesas R-Car H3Ne-1.7G (R8A779MB) and R-Car V3H2 (R8A77980A) are
    minor updates of R8A77951 and R8A77980, respectively.
 
  - Qualcomm IPQ8064-v2.0, IPQ8062 and IPQ8065 are all variants of the
    IPQ8064 chip, with minimally different features.
 
 The AMD Pensando Elba and Apple M1 Ultra SoC support was getting close
 this time, but in the end did not make the cut.
 
 The new machines based on existing SoC support are fairly uneventful:
 
  - Sony Xperia 1 IV is a fairly recent phone based on Qualcomm
    Snapdragon 8 Gen 1.
 
  - Three Samsung phones based on Snapdragon 410: Galaxy E5, E7 and
    Grand Max. These are added for both 32-bit and 64-bit kernels,
    as they originally shipped running 32-bit code.
 
  - Two new servers using AST2600 BMCs: AMD DaytonaX and Ampere
    Mt. Mitchell
 
  - Three new machines based on Rockchips RK3399 and RK3566:
    Anberic RG353P and RG503, Pine64 Pinephone Pro, Open AI Lab
 
  - Multiple NXP i.MX6/i.MX8 based boards: Kontron SL/BL i.MX8MM OSM-S,
    i.MX8MM Gateworks GW7904, MSC SM2S-IMX8PLUS SoM and carrier board
 
  - Two development boards in the Microchip AT91 family:
    SAMA5D3-EDS and lan966x-pcb8290.
 
  - Minor variants of existing boards using Amlogic, Broadcom, Marvell,
    Rockchips, Freescale Layerscape and Socionext Uniphier SoCs.
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Merge tag 'arm-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM devicetree updates from Arnd Bergmann:
 "Most of the changes fall into one of three categories: adding support
  for additional devices on existing machines, cleaning up issues found
  by the ongoing conversion to machine-readable bindings, and addressing
  minor mistakes in the existing DT data.

  Across SoC vendors, Qualcomm and Freescale stick out as getting the
  most updates, which corresponds to their dominance in the mobile phone
  and embedded industrial markets, respectively.

  There are 636 non-merge changeset in this branch, which is a little
  lower than most times, but more importantly we only add 36 machine
  files, which is about half of what we had the past few releases.

  Eight new SoCs are added, but all of them are variations of already
  supported SoC families, and most of them come with one reference board
  design from the SoC vendor:

   - Mediatek MT8186 is a Chromebook/Tablet type SoC, similar to the
     MT65xx series of phone SoCs, with two Cortex-A76 and six Cortex-A55
     cores.

   - TI AM62A is another member of the K3 family with Cortex-A53 cores,
     this one is targetted at Video/Vision processing for industrial and
     automotive applications.

   - NXP i.MX8DXL is another chip for this market in the ever-growing
     i.MX8 family, this one again with two Cortex-A35 cores.

   - Renesas R-Car H3Ne-1.7G (R8A779MB) and R-Car V3H2 (R8A77980A) are
     minor updates of R8A77951 and R8A77980, respectively.

   - Qualcomm IPQ8064-v2.0, IPQ8062 and IPQ8065 are all variants of the
     IPQ8064 chip, with minimally different features.

  The AMD Pensando Elba and Apple M1 Ultra SoC support was getting close
  this time, but in the end did not make the cut.

  The new machines based on existing SoC support are fairly uneventful:

   - Sony Xperia 1 IV is a fairly recent phone based on Qualcomm
     Snapdragon 8 Gen 1.

   - Three Samsung phones based on Snapdragon 410: Galaxy E5, E7 and
     Grand Max. These are added for both 32-bit and 64-bit kernels, as
     they originally shipped running 32-bit code.

   - Two new servers using AST2600 BMCs: AMD DaytonaX and Ampere Mt.
     Mitchell

   - Three new machines based on Rockchips RK3399 and RK3566: Anberic
     RG353P and RG503, Pine64 Pinephone Pro, Open AI Lab

   - Multiple NXP i.MX6/i.MX8 based boards: Kontron SL/BL i.MX8MM OSM-S,
     i.MX8MM Gateworks GW7904, MSC SM2S-IMX8PLUS SoM and carrier board

   - Two development boards in the Microchip AT91 family: SAMA5D3-EDS
     and lan966x-pcb8290.

   - Minor variants of existing boards using Amlogic, Broadcom, Marvell,
     Rockchips, Freescale Layerscape and Socionext Uniphier SoCs"

* tag 'arm-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (617 commits)
  Revert "ARM: dts: BCM5301X: Add basic PCI controller properties"
  ARM: dts: s5pv210: correct double "pins" in pinmux node
  ARM: dts: exynos: fix polarity of VBUS GPIO of Origen
  arm64: dts: exynos: fix polarity of "enable" line of NFC chip in TM2
  arm64: dts: uniphier: Add L2 cache node
  arm64: dts: uniphier: Remove compatible "snps,dw-pcie" from pcie node
  arm64: dts: uniphier: Fix opp-table node name for LD20
  arm64: dts: uniphier: Add USB-device support for PXs3 reference board
  arm64: dts: uniphier: Add ahci controller nodes for PXs3
  arm64: dts: uniphier: Use GIC interrupt definitions
  arm64: dts: uniphier: Rename gpio-hog nodes
  arm64: dts: uniphier: Rename usb-glue node for USB3 to usb-controller
  arm64: dts: uniphier: Rename usb-phy node for USB2 to usb-controller
  arm64: dts: uniphier: Rename pvtctl node to thermal-sensor
  ARM: dts: uniphier: Remove compatible "snps,dw-pcie-ep" from pcie-ep node
  ARM: dts: uniphier: Move interrupt-parent property to each child node in uniphier-support-card
  ARM: dts: uniphier: Add ahci controller nodes for PXs2
  ARM: dts: uniphier: Add ahci controller nodes for Pro4
  ARM: dts: uniphier: Use GIC interrupt definitions
  ARM: dts: uniphier: Rename gpio-hog node
  ...
2022-10-06 11:13:04 -07:00
Clark Wang
0acd1b1cf3 arm64: dts: imx8ulp: increase the clock speed of LPSPI
LPSPI transfer max speed is half of the root clock.
Increase the root clock speed to support faster data transmission.

And update the parent clock of all i2c/spi with IMX8ULP_CLK_FROSC_DIV2
which could produce accurate clock for i2c/spi usage.

Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:28 +08:00
Peng Fan
d2209e6584 arm64: dts: imx8ulp: add mailbox node
Add Sentinel Message Unit(MU), Generic MU nodes.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:28 +08:00
Peng Fan
ed4b58fa5a arm64: dts: imx8ulp: add pmu node
Add i.MX8ULP pmu node

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:27 +08:00
Peng Fan
b2ca63697b arm64: dts: imx8ulp: correct the scmi sram node name
Follow sram/sram.yaml to update the sram node name.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:27 +08:00
Peng Fan
7e2c9e5146 arm64: dts: imx8ulp: drop undocumented property in cgc
The clocks and clocks-names are not documented in binding doc,
and the clk-imx8ulp driver not use the undocumented property,
so drop them.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:27 +08:00
Wei Fang
683d7ffb7d arm64: dts: imx8ulp: Add the fec support
Add the fec support on i.MX8ULP platforms.

Signed-off-by: Wei Fang <wei.fang@nxp.com>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-17 16:34:19 +08:00
Peng Fan
5fa383a25f arm64: dts: imx8ulp: add #reset-cells for pcc
The binding file clock/imx8ulp-pcc-clock.yaml indicates '#reset-cells'
is a required property, add it.

Fixes: fe6291e963 ("arm64: dts: imx8ulp: Add the basic dtsi file for imx8ulp")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-09-05 11:38:44 +08:00
Fabio Estevam
fcdef92ba6 arm64: dts: imx8m: Pass a label to the soc node
Pass a label to the 'soc' node to make it easier to reference
it from other devicetree files.

U-Boot, for example usually needs to access the AIPS node to
pass U-Boot-specific properties.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-20 08:36:57 +08:00
Krzysztof Kozlowski
33597c6257 arm64: dts: fsl: adjust whitespace around '='
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment.  No functional
changes (same DTB).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-14 18:06:25 +08:00
Peng Fan
0a078845ba arm64: dts: imx8ulp: address build warning
Fix warnings such as:
 Warning (simple_bus_reg): /soc@0/gpio@2e200000: simple-bus unit address
 format error, expected "2e200080"

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-06-10 16:35:16 +08:00
Sudeep Holla
45d941f67b arm64: dts: imx8ulp: Set #thermal-sensor-cells to 1 as required
The SCMI binding clearly states the value of #thermal-sensor-cells must
be 1. However arch/arm64/boot/dts/freescale/imx8ulp.dtsi sets it 0 which
results in the following warning with dtbs_check:

  |  arch/arm64/boot/dts/freescale/imx8ulp-evk.dt.yaml: scmi:
  | 		protocol@15:#thermal-sensor-cells:0:0: 1 was expected
  |	From schema: Documentation/devicetree/bindings/firmware/arm,scmi.yaml

Fix it by setting it to 1 as required.

Cc:Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Fixes: a38771d7a4 ("arm64: dts: imx8ulp: add scmi firmware node")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2022-02-14 08:39:12 +08:00
Peng Fan
03eb813dac arm64: dts: imx8ulp: add power domain entry for usdhc
Add power domain for USDHC node.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 16:33:02 +08:00
Peng Fan
a38771d7a4 arm64: dts: imx8ulp: add scmi firmware node
i.MX8ULP use scmi firmware based power domain and sensor support.
So add the firmware node and the sram it uses.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 16:33:02 +08:00
Jacky Bai
fe6291e963 arm64: dts: imx8ulp: Add the basic dtsi file for imx8ulp
Add the basic dtsi support for i.MX8ULP.

i.MX 8ULP is part of the ULP family with emphasis on extreme
low-power techniques using the 28 nm fully depleted silicon on
insulator process. Like i.MX 7ULP, i.MX 8ULP continues to be
based on asymmetric architecture, however will add a third DSP
domain for advanced voice/audio capability and a Graphics domain
where it is possible to access graphics resources from the
application side or the realtime side.

Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-06 11:08:49 +08:00