drm: fsl-dcu: enable PIXCLK on LS1021A

The PIXCLK needs to be enabled in SCFG before accessing certain DCU
registers, or the access will hang. For simplicity, the PIXCLK is enabled
unconditionally, resulting in increased power consumption.

Signed-off-by: Matthias Schiffer <matthias.schiffer@tq-group.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Fixes: 109eee2f2a ("drm/layerscape: Add Freescale DCU DRM driver")
Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240926055552.1632448-2-alexander.stein@ew.tq-group.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
This commit is contained in:
Matthias Schiffer 2024-09-26 07:55:51 +02:00 committed by Dmitry Baryshkov
parent 5b7abfb20b
commit ffcde9e44d
3 changed files with 19 additions and 0 deletions

View file

@ -9,6 +9,7 @@ config DRM_FSL_DCU
select DRM_PANEL
select REGMAP_MMIO
select VIDEOMODE_HELPERS
select MFD_SYSCON if SOC_LS1021A
help
Choose this option if you have an Freescale DCU chipset.
If M is selected the module will be called fsl-dcu-drm.

View file

@ -101,12 +101,27 @@ static void fsl_dcu_irq_uninstall(struct drm_device *dev)
static int fsl_dcu_load(struct drm_device *dev, unsigned long flags)
{
struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
struct regmap *scfg;
int ret;
ret = fsl_dcu_drm_modeset_init(fsl_dev);
if (ret < 0)
return dev_err_probe(dev->dev, ret, "failed to initialize mode setting\n");
scfg = syscon_regmap_lookup_by_compatible("fsl,ls1021a-scfg");
if (PTR_ERR(scfg) != -ENODEV) {
/*
* For simplicity, enable the PIXCLK unconditionally,
* resulting in increased power consumption. Disabling
* the clock in PM or on unload could be implemented as
* a future improvement.
*/
ret = regmap_update_bits(scfg, SCFG_PIXCLKCR, SCFG_PIXCLKCR_PXCEN,
SCFG_PIXCLKCR_PXCEN);
if (ret < 0)
return dev_err_probe(dev->dev, ret, "failed to enable pixclk\n");
}
ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
if (ret < 0) {
dev_err(dev->dev, "failed to initialize vblank\n");

View file

@ -160,6 +160,9 @@
#define FSL_DCU_ARGB4444 12
#define FSL_DCU_YUV422 14
#define SCFG_PIXCLKCR 0x28
#define SCFG_PIXCLKCR_PXCEN BIT(31)
#define VF610_LAYER_REG_NUM 9
#define LS1021A_LAYER_REG_NUM 10