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riscv: dts: renesas: rzfive-smarc-som: Drop deleting interrupt properties from ETH0/1 nodes

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Now that we have enabled IRQC support for RZ/Five SoC switch to interrupt
mode for ethernet0/1 PHYs instead of polling mode.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240403203503.634465-6-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Lad Prabhakar 2024-04-03 21:35:03 +01:00 • committed by Geert Uytterhoeven
parent 1731ab2f8b
commit fc5d2b222a
1 changed files with 0 additions and 16 deletions
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16
arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
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@ -6,19 +6,3 @@
*/
#include <arm64/renesas/rzg2ul-smarc-som.dtsi>
#if (!SW_ET0_EN_N)
&eth0 {
phy0: ethernet-phy@7 {
/delete-property/ interrupt-parent;
/delete-property/ interrupts;
};
};
#endif
&eth1 {
phy1: ethernet-phy@7 {
/delete-property/ interrupt-parent;
/delete-property/ interrupts;
};
};