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ARM: dts: imx6sl: add pinctrl uhs states for usdhc

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This is needed for SD3.0 cards working on UHS mode.

Signed-off-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Dong Aisheng 2013-10-09 19:20:07 +08:00 • committed by Shawn Guo
parent 2f35c0c41f
commit fa87dfd6d0
2 changed files with 86 additions and 3 deletions
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12
arch/arm/boot/dts/imx6sl-evk.dts
View file

@ -89,8 +89,10 @@
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1_1>;
pinctrl-1 = <&pinctrl_usdhc1_1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc1_1_200mhz>;
bus-width = <8>;
cd-gpios = <&gpio4 7 0>;
wp-gpios = <&gpio4 6 0>;
@ -98,16 +100,20 @@
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2_1>;
pinctrl-1 = <&pinctrl_usdhc2_1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc2_1_200mhz>;
cd-gpios = <&gpio5 0 0>;
wp-gpios = <&gpio4 29 0>;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3_1>;
pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>;
cd-gpios = <&gpio3 22 0>;
status = "okay";
};

77
arch/arm/boot/dts/imx6sl.dtsi
View file

@ -639,6 +639,38 @@
MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059
>;
};
pinctrl_usdhc1_1_100mhz: usdhc1grp-1-100mhz {
fsl,pins = <
MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9
MX6SL_PAD_SD1_CLK__SD1_CLK 0x100b9
MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9
MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9
MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9
MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9
MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9
MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9
MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9
MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9
>;
};
pinctrl_usdhc1_1_200mhz: usdhc1grp-1-200mhz {
fsl,pins = <
MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9
MX6SL_PAD_SD1_CLK__SD1_CLK 0x100f9
MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170f9
MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170f9
MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170f9
MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170f9
>;
};
};
usdhc2 {
@ -652,6 +684,29 @@
MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059
>;
};
pinctrl_usdhc2_1_100mhz: usdhc2grp-1-100mhz {
fsl,pins = <
MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9
MX6SL_PAD_SD2_CLK__SD2_CLK 0x100b9
MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
>;
};
pinctrl_usdhc2_1_200mhz: usdhc2grp-1-200mhz {
fsl,pins = <
MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9
MX6SL_PAD_SD2_CLK__SD2_CLK 0x100f9
MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
>;
};
};
usdhc3 {
@ -665,6 +720,28 @@
MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059
>;
};
pinctrl_usdhc3_1_100mhz: usdhc3grp-1-100mhz {
fsl,pins = <
MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9
MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9
MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
>;
};
pinctrl_usdhc3_1_200mhz: usdhc3grp-1-200mhz {
fsl,pins = <
MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9
MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9
MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
>;
};
};
};