dt-bindings: interrupt-controller: convert marvell,mpic binding to YAML

Convert the marvell,mpic device-tree binding to YAML. Add myself as
maintainer.

Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240624145355.8034-3-kabel@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Marek Behún 2024-06-24 16:53:55 +02:00 committed by Arnd Bergmann
parent 2af8d8a583
commit f7e642bcd6
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3 changed files with 64 additions and 38 deletions

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@ -1,38 +0,0 @@
Marvell Armada 370, 375, 38x, XP Interrupt Controller
-----------------------------------------------------
Required properties:
- compatible: Should be "marvell,mpic"
- interrupt-controller: Identifies the node as an interrupt controller.
- msi-controller: Identifies the node as an PCI Message Signaled
Interrupt controller.
- #interrupt-cells: The number of cells to define the interrupts. Should be 1.
The cell is the IRQ number
- reg: Should contain PMIC registers location and length. First pair
for the main interrupt registers, second pair for the per-CPU
interrupt registers. For this last pair, to be compliant with SMP
support, the "virtual" must be use (For the record, these registers
automatically map to the interrupt controller registers of the
current CPU)
Optional properties:
- interrupts: If defined, then it indicates that this MPIC is
connected as a slave to another interrupt controller. This is
typically the case on Armada 375 and Armada 38x, where the MPIC is
connected as a slave to the Cortex-A9 GIC. The provided interrupt
indicate to which GIC interrupt the MPIC output is connected.
Example:
mpic: interrupt-controller@d0020000 {
compatible = "marvell,mpic";
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
interrupt-controller;
msi-controller;
reg = <0xd0020a00 0x1d0>,
<0xd0021070 0x58>;
};

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@ -0,0 +1,63 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/marvell,mpic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Marvell Armada 370, 375, 38x, 39x, XP Interrupt Controller
maintainers:
- Marek Behún <kabel@kernel.org>
description: |
The top-level interrupt controller on Marvell Armada 370 and XP. On these
platforms it also provides inter-processor interrupts.
On Marvell Armada 375, 38x and 39x this controller is wired under ARM GIC.
Provides MSI handling for the PCIe controllers.
properties:
compatible:
const: marvell,mpic
reg:
items:
- description: main registers
- description: per-cpu registers
interrupts:
items:
- description: |
Parent interrupt on platforms where MPIC is not the top-level
interrupt controller.
interrupt-controller: true
'#interrupt-cells':
const: 1
msi-controller: true
required:
- compatible
- reg
- interrupt-controller
- '#interrupt-cells'
- msi-controller
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
interrupt-controller@20a00 {
compatible = "marvell,mpic";
reg = <0x20a00 0x2d0>, <0x21070 0x58>;
interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
msi-controller;
};

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@ -2211,6 +2211,7 @@ F: Documentation/ABI/testing/sysfs-firmware-turris-mox-rwtm
F: Documentation/devicetree/bindings/bus/moxtet.txt
F: Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.txt
F: Documentation/devicetree/bindings/gpio/gpio-moxtet.txt
F: Documentation/devicetree/bindings/interrupt-controller/marvell,mpic.yaml
F: Documentation/devicetree/bindings/leds/cznic,turris-omnia-leds.yaml
F: Documentation/devicetree/bindings/watchdog/armada-37xx-wdt.txt
F: drivers/bus/moxtet.c