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iio: adc: ad7606: add support for AD7606C-{16,18} parts
The AD7606C-16 and AD7606C-18 are pretty similar with the AD7606B. The main difference between AD7606C-16 & AD7606C-18 is the precision in bits (16 vs 18). Because of that, some scales need to be defined for the 18-bit variants, as they need to be computed against 2**18 (vs 2**16 for the 16 bit-variants). Because the AD7606C-16,18 also supports bipolar & differential channels, for SW-mode, the default range of 10 V or ±10V should be set at probe. On reset, the default range (in the registers) is set to value 0x3 which corresponds to '±10 V single-ended range', regardless of bipolar or differential configuration. Aside from the scale/ranges, the AD7606C-16 is similar to the AD7606B. The AD7606C-18 variant offers 18-bit precision. Because of this, the requirement to use this chip is that the SPI controller supports padding of 18-bit sequences to 32-bit arrays. Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-16.pdf Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606c-18.pdf Signed-off-by: Alexandru Ardelean <aardelean@baylibre.com> Link: https://patch.msgid.link/20240919130444.2100447-9-aardelean@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Alexandru Ardelean
Jonathan Cameron
parent
0733e5148b
commit
f3838e934d
3 changed files with 321 additions and 12 deletions
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@ -36,6 +36,33 @@ static const unsigned int ad7606_16bit_hw_scale_avail[2] = {
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152588, 305176
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};
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static const unsigned int ad7606_18bit_hw_scale_avail[2] = {
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38147, 76294
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};
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static const unsigned int ad7606c_16bit_single_ended_unipolar_scale_avail[3] = {
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76294, 152588, 190735,
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};
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static const unsigned int ad7606c_16bit_single_ended_bipolar_scale_avail[5] = {
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76294, 152588, 190735, 305176, 381470
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};
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static const unsigned int ad7606c_16bit_differential_bipolar_scale_avail[4] = {
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152588, 305176, 381470, 610352
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};
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static const unsigned int ad7606c_18bit_single_ended_unipolar_scale_avail[3] = {
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19073, 38147, 47684
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};
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static const unsigned int ad7606c_18bit_single_ended_bipolar_scale_avail[5] = {
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19073, 38147, 47684, 76294, 95367
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};
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static const unsigned int ad7606c_18bit_differential_bipolar_scale_avail[4] = {
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38147, 76294, 95367, 152588
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};
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static const unsigned int ad7606_16bit_sw_scale_avail[3] = {
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76293, 152588, 305176
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@ -62,7 +89,8 @@ int ad7606_reset(struct ad7606_state *st)
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}
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EXPORT_SYMBOL_NS_GPL(ad7606_reset, IIO_AD7606);
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static int ad7606_16bit_chan_scale_setup(struct ad7606_state *st, int ch)
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static int ad7606_16bit_chan_scale_setup(struct ad7606_state *st,
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struct iio_chan_spec *chan, int ch)
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{
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struct ad7606_chan_scale *cs = &st->chan_scales[ch];
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@ -83,6 +111,173 @@ static int ad7606_16bit_chan_scale_setup(struct ad7606_state *st, int ch)
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return 0;
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}
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static int ad7606_get_chan_config(struct ad7606_state *st, int ch,
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bool *bipolar, bool *differential)
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{
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unsigned int num_channels = st->chip_info->num_channels - 1;
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struct device *dev = st->dev;
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int ret;
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*bipolar = false;
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*differential = false;
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device_for_each_child_node_scoped(dev, child) {
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u32 pins[2];
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int reg;
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ret = fwnode_property_read_u32(child, "reg", ®);
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if (ret)
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continue;
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/* channel number (here) is from 1 to num_channels */
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if (reg == 0 || reg > num_channels) {
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dev_warn(dev,
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"Invalid channel number (ignoring): %d\n", reg);
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continue;
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}
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if (reg != (ch + 1))
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continue;
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*bipolar = fwnode_property_read_bool(child, "bipolar");
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ret = fwnode_property_read_u32_array(child, "diff-channels",
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pins, ARRAY_SIZE(pins));
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/* Channel is differential, if pins are the same as 'reg' */
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if (ret == 0 && (pins[0] != reg || pins[1] != reg)) {
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dev_err(dev,
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"Differential pins must be the same as 'reg'");
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return -EINVAL;
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}
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*differential = (ret == 0);
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if (*differential && !*bipolar) {
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dev_err(dev,
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"'bipolar' must be added for diff channel %d\n",
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reg);
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return -EINVAL;
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}
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return 0;
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}
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return 0;
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}
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static int ad7606c_18bit_chan_scale_setup(struct ad7606_state *st,
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struct iio_chan_spec *chan, int ch)
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{
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struct ad7606_chan_scale *cs = &st->chan_scales[ch];
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bool bipolar, differential;
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int ret;
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if (!st->sw_mode_en) {
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cs->range = 0;
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cs->scale_avail = ad7606_18bit_hw_scale_avail;
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cs->num_scales = ARRAY_SIZE(ad7606_18bit_hw_scale_avail);
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return 0;
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}
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ret = ad7606_get_chan_config(st, ch, &bipolar, &differential);
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if (ret)
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return ret;
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if (differential) {
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cs->scale_avail = ad7606c_18bit_differential_bipolar_scale_avail;
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cs->num_scales =
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ARRAY_SIZE(ad7606c_18bit_differential_bipolar_scale_avail);
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/* Bipolar differential ranges start at 8 (b1000) */
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cs->reg_offset = 8;
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cs->range = 1;
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chan->differential = 1;
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chan->channel2 = chan->channel;
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return 0;
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}
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chan->differential = 0;
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if (bipolar) {
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cs->scale_avail = ad7606c_18bit_single_ended_bipolar_scale_avail;
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cs->num_scales =
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ARRAY_SIZE(ad7606c_18bit_single_ended_bipolar_scale_avail);
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/* Bipolar single-ended ranges start at 0 (b0000) */
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cs->reg_offset = 0;
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cs->range = 3;
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chan->scan_type.sign = 's';
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return 0;
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}
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cs->scale_avail = ad7606c_18bit_single_ended_unipolar_scale_avail;
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cs->num_scales =
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ARRAY_SIZE(ad7606c_18bit_single_ended_unipolar_scale_avail);
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/* Unipolar single-ended ranges start at 5 (b0101) */
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cs->reg_offset = 5;
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cs->range = 1;
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chan->scan_type.sign = 'u';
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return 0;
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}
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static int ad7606c_16bit_chan_scale_setup(struct ad7606_state *st,
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struct iio_chan_spec *chan, int ch)
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{
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struct ad7606_chan_scale *cs = &st->chan_scales[ch];
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bool bipolar, differential;
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int ret;
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if (!st->sw_mode_en) {
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cs->range = 0;
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cs->scale_avail = ad7606_16bit_hw_scale_avail;
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cs->num_scales = ARRAY_SIZE(ad7606_16bit_hw_scale_avail);
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return 0;
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}
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ret = ad7606_get_chan_config(st, ch, &bipolar, &differential);
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if (ret)
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return ret;
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if (differential) {
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cs->scale_avail = ad7606c_16bit_differential_bipolar_scale_avail;
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cs->num_scales =
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ARRAY_SIZE(ad7606c_16bit_differential_bipolar_scale_avail);
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/* Bipolar differential ranges start at 8 (b1000) */
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cs->reg_offset = 8;
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cs->range = 1;
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chan->differential = 1;
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chan->channel2 = chan->channel;
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chan->scan_type.sign = 's';
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return 0;
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}
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chan->differential = 0;
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if (bipolar) {
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cs->scale_avail = ad7606c_16bit_single_ended_bipolar_scale_avail;
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cs->num_scales =
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ARRAY_SIZE(ad7606c_16bit_single_ended_bipolar_scale_avail);
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/* Bipolar single-ended ranges start at 0 (b0000) */
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cs->reg_offset = 0;
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cs->range = 3;
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chan->scan_type.sign = 's';
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return 0;
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}
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cs->scale_avail = ad7606c_16bit_single_ended_unipolar_scale_avail;
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cs->num_scales =
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ARRAY_SIZE(ad7606c_16bit_single_ended_unipolar_scale_avail);
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/* Unipolar single-ended ranges start at 5 (b0101) */
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cs->reg_offset = 5;
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cs->range = 1;
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chan->scan_type.sign = 'u';
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return 0;
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}
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static int ad7606_reg_access(struct iio_dev *indio_dev,
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unsigned int reg,
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unsigned int writeval,
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@ -107,9 +302,8 @@ static int ad7606_reg_access(struct iio_dev *indio_dev,
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static int ad7606_read_samples(struct ad7606_state *st)
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{
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unsigned int num = st->chip_info->num_channels - 1;
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u16 *data = st->data;
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return st->bops->read_block(st->dev, num, data);
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return st->bops->read_block(st->dev, num, &st->data);
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}
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static irqreturn_t ad7606_trigger_handler(int irq, void *p)
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@ -125,7 +319,7 @@ static irqreturn_t ad7606_trigger_handler(int irq, void *p)
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if (ret)
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goto error_ret;
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iio_push_to_buffers_with_timestamp(indio_dev, st->data,
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iio_push_to_buffers_with_timestamp(indio_dev, &st->data,
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iio_get_time_ns(indio_dev));
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error_ret:
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iio_trigger_notify_done(indio_dev->trig);
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@ -139,6 +333,8 @@ static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch,
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int *val)
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{
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struct ad7606_state *st = iio_priv(indio_dev);
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unsigned int storagebits = st->chip_info->channels[1].scan_type.storagebits;
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const struct iio_chan_spec *chan;
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int ret;
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gpiod_set_value(st->gpio_convst, 1);
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@ -153,7 +349,18 @@ static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch,
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if (ret)
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goto error_ret;
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*val = sign_extend32(st->data[ch], 15);
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chan = &indio_dev->channels[ch + 1];
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if (chan->scan_type.sign == 'u') {
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if (storagebits > 16)
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*val = st->data.buf32[ch];
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else
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*val = st->data.buf16[ch];
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} else {
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if (storagebits > 16)
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*val = sign_extend32(st->data.buf32[ch], 17);
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else
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*val = sign_extend32(st->data.buf16[ch], 15);
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}
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error_ret:
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gpiod_set_value(st->gpio_convst, 0);
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@ -266,7 +473,7 @@ static int ad7606_write_raw(struct iio_dev *indio_dev,
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ch = chan->address;
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cs = &st->chan_scales[ch];
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i = find_closest(val2, cs->scale_avail, cs->num_scales);
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ret = st->write_scale(indio_dev, ch, i);
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ret = st->write_scale(indio_dev, ch, i + cs->reg_offset);
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if (ret < 0)
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return ret;
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cs->range = i;
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@ -349,6 +556,18 @@ static const struct iio_chan_spec ad7606_channels_16bit[] = {
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AD7606_CHANNEL(7, 16),
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};
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static const struct iio_chan_spec ad7606_channels_18bit[] = {
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IIO_CHAN_SOFT_TIMESTAMP(8),
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AD7606_CHANNEL(0, 18),
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AD7606_CHANNEL(1, 18),
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AD7606_CHANNEL(2, 18),
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AD7606_CHANNEL(3, 18),
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AD7606_CHANNEL(4, 18),
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AD7606_CHANNEL(5, 18),
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AD7606_CHANNEL(6, 18),
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AD7606_CHANNEL(7, 18),
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};
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/*
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* The current assumption that this driver makes for AD7616, is that it's
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* working in Hardware Mode with Serial, Burst and Sequencer modes activated.
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@ -414,6 +633,20 @@ static const struct ad7606_chip_info ad7606_chip_info_tbl[] = {
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.oversampling_avail = ad7606_oversampling_avail,
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.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
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},
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[ID_AD7606C_16] = {
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.channels = ad7606_channels_16bit,
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.num_channels = 9,
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.scale_setup_cb = ad7606c_16bit_chan_scale_setup,
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.oversampling_avail = ad7606_oversampling_avail,
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.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
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},
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[ID_AD7606C_18] = {
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.channels = ad7606_channels_18bit,
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.num_channels = 9,
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.scale_setup_cb = ad7606c_18bit_chan_scale_setup,
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.oversampling_avail = ad7606_oversampling_avail,
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.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
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},
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[ID_AD7616] = {
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.channels = ad7616_channels,
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.num_channels = 17,
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@ -586,7 +819,7 @@ static const struct iio_trigger_ops ad7606_trigger_ops = {
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.validate_device = iio_trigger_validate_own_device,
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};
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static int ad7606_sw_mode_setup(struct iio_dev *indio_dev)
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static int ad7606_sw_mode_setup(struct iio_dev *indio_dev, unsigned int id)
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{
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struct ad7606_state *st = iio_priv(indio_dev);
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@ -604,13 +837,24 @@ static int ad7606_chan_scales_setup(struct iio_dev *indio_dev)
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{
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unsigned int num_channels = indio_dev->num_channels - 1;
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struct ad7606_state *st = iio_priv(indio_dev);
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struct iio_chan_spec *chans;
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size_t size;
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int ch, ret;
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/* Clone IIO channels, since some may be differential */
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size = indio_dev->num_channels * sizeof(*indio_dev->channels);
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chans = devm_kzalloc(st->dev, size, GFP_KERNEL);
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if (!chans)
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return -ENOMEM;
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memcpy(chans, indio_dev->channels, size);
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indio_dev->channels = chans;
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for (ch = 0; ch < num_channels; ch++) {
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struct ad7606_chan_scale *cs;
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int i;
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ret = st->chip_info->scale_setup_cb(st, ch);
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ret = st->chip_info->scale_setup_cb(st, &chans[ch + 1], ch);
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if (ret)
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return ret;
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@ -698,7 +942,7 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
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st->write_scale = ad7606_write_scale_hw;
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st->write_os = ad7606_write_os_hw;
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ret = ad7606_sw_mode_setup(indio_dev);
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ret = ad7606_sw_mode_setup(indio_dev, id);
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if (ret)
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return ret;
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@ -63,7 +63,8 @@
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struct ad7606_state;
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typedef int (*ad7606_scale_setup_cb_t)(struct ad7606_state *st, int ch);
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typedef int (*ad7606_scale_setup_cb_t)(struct ad7606_state *st,
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struct iio_chan_spec *chan, int ch);
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/**
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* struct ad7606_chip_info - chip specific information
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@ -94,6 +95,8 @@ struct ad7606_chip_info {
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* such that it can be read via the 'read_avail' hook
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* @num_scales number of elements stored in the scale_avail array
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* @range voltage range selection, selects which scale to apply
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* @reg_offset offset for the register value, to be applied when
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* writing the value of 'range' to the register value
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*/
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struct ad7606_chan_scale {
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#define AD760X_MAX_SCALES 16
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@ -102,6 +105,7 @@ struct ad7606_chan_scale {
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int scale_avail_show[AD760X_MAX_SCALE_SHOW];
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unsigned int num_scales;
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unsigned int range;
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unsigned int reg_offset;
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};
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/**
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@ -158,9 +162,13 @@ struct ad7606_state {
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/*
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* DMA (thus cache coherency maintenance) may require the
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* transfer buffers to live in their own cache lines.
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* 16 * 16-bit samples + 64-bit timestamp
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* 16 * 16-bit samples + 64-bit timestamp - for AD7616
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* 8 * 32-bit samples + 64-bit timestamp - for AD7616C-18 (and similar)
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*/
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unsigned short data[20] __aligned(IIO_DMA_MINALIGN);
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union {
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u16 buf16[20];
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u32 buf32[10];
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} data __aligned(IIO_DMA_MINALIGN);
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__be16 d16[2];
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};
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@ -201,6 +209,8 @@ enum ad7606_supported_device_ids {
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ID_AD7606_6,
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ID_AD7606_4,
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ID_AD7606B,
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||||
ID_AD7606C_16,
|
||||
ID_AD7606C_18,
|
||||
ID_AD7616,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -77,6 +77,18 @@ static const struct iio_chan_spec ad7606b_sw_channels[] = {
|
|||
AD7606_SW_CHANNEL(7, 16),
|
||||
};
|
||||
|
||||
static const struct iio_chan_spec ad7606c_18_sw_channels[] = {
|
||||
IIO_CHAN_SOFT_TIMESTAMP(8),
|
||||
AD7606_SW_CHANNEL(0, 18),
|
||||
AD7606_SW_CHANNEL(1, 18),
|
||||
AD7606_SW_CHANNEL(2, 18),
|
||||
AD7606_SW_CHANNEL(3, 18),
|
||||
AD7606_SW_CHANNEL(4, 18),
|
||||
AD7606_SW_CHANNEL(5, 18),
|
||||
AD7606_SW_CHANNEL(6, 18),
|
||||
AD7606_SW_CHANNEL(7, 18),
|
||||
};
|
||||
|
||||
static const unsigned int ad7606B_oversampling_avail[9] = {
|
||||
1, 2, 4, 8, 16, 32, 64, 128, 256
|
||||
};
|
||||
|
|
@ -120,6 +132,19 @@ static int ad7606_spi_read_block(struct device *dev,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int ad7606_spi_read_block18to32(struct device *dev,
|
||||
int count, void *buf)
|
||||
{
|
||||
struct spi_device *spi = to_spi_device(dev);
|
||||
struct spi_transfer xfer = {
|
||||
.bits_per_word = 18,
|
||||
.len = count * sizeof(u32),
|
||||
.rx_buf = buf,
|
||||
};
|
||||
|
||||
return spi_sync_transfer(spi, &xfer, 1);
|
||||
}
|
||||
|
||||
static int ad7606_spi_reg_read(struct ad7606_state *st, unsigned int addr)
|
||||
{
|
||||
struct spi_device *spi = to_spi_device(st->dev);
|
||||
|
|
@ -283,6 +308,19 @@ static int ad7606B_sw_mode_config(struct iio_dev *indio_dev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int ad7606c_18_sw_mode_config(struct iio_dev *indio_dev)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = ad7606B_sw_mode_config(indio_dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
indio_dev->channels = ad7606c_18_sw_channels;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct ad7606_bus_ops ad7606_spi_bops = {
|
||||
.read_block = ad7606_spi_read_block,
|
||||
};
|
||||
|
|
@ -305,6 +343,15 @@ static const struct ad7606_bus_ops ad7606B_spi_bops = {
|
|||
.sw_mode_config = ad7606B_sw_mode_config,
|
||||
};
|
||||
|
||||
static const struct ad7606_bus_ops ad7606c_18_spi_bops = {
|
||||
.read_block = ad7606_spi_read_block18to32,
|
||||
.reg_read = ad7606_spi_reg_read,
|
||||
.reg_write = ad7606_spi_reg_write,
|
||||
.write_mask = ad7606_spi_write_mask,
|
||||
.rd_wr_cmd = ad7606B_spi_rd_wr_cmd,
|
||||
.sw_mode_config = ad7606c_18_sw_mode_config,
|
||||
};
|
||||
|
||||
static int ad7606_spi_probe(struct spi_device *spi)
|
||||
{
|
||||
const struct spi_device_id *id = spi_get_device_id(spi);
|
||||
|
|
@ -315,8 +362,12 @@ static int ad7606_spi_probe(struct spi_device *spi)
|
|||
bops = &ad7616_spi_bops;
|
||||
break;
|
||||
case ID_AD7606B:
|
||||
case ID_AD7606C_16:
|
||||
bops = &ad7606B_spi_bops;
|
||||
break;
|
||||
case ID_AD7606C_18:
|
||||
bops = &ad7606c_18_spi_bops;
|
||||
break;
|
||||
default:
|
||||
bops = &ad7606_spi_bops;
|
||||
break;
|
||||
|
|
@ -333,6 +384,8 @@ static const struct spi_device_id ad7606_id_table[] = {
|
|||
{ "ad7606-6", ID_AD7606_6 },
|
||||
{ "ad7606-8", ID_AD7606_8 },
|
||||
{ "ad7606b", ID_AD7606B },
|
||||
{ "ad7606c-16", ID_AD7606C_16 },
|
||||
{ "ad7606c-18", ID_AD7606C_18 },
|
||||
{ "ad7616", ID_AD7616 },
|
||||
{ }
|
||||
};
|
||||
|
|
@ -344,6 +397,8 @@ static const struct of_device_id ad7606_of_match[] = {
|
|||
{ .compatible = "adi,ad7606-6" },
|
||||
{ .compatible = "adi,ad7606-8" },
|
||||
{ .compatible = "adi,ad7606b" },
|
||||
{ .compatible = "adi,ad7606c-16" },
|
||||
{ .compatible = "adi,ad7606c-18" },
|
||||
{ .compatible = "adi,ad7616" },
|
||||
{ }
|
||||
};
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue