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spi: dt-bindings: cleanup examples - indentation, lowercase hex
Cleanup examples: - use 4-space indentation (for cases when it is neither 4 not 2 space), - drop redundant blank lines, - use lowercase hex. No functional impact except adjusting to preferred coding style. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> # renesas Reviewed-by: Andrew Jeffery <andrew@aj.id.au> # aspeed Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> # meson Link: https://lore.kernel.org/r/20230124083342.34869-2-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Krzysztof Kozlowski
Mark Brown
parent
99a7fa0e75
commit
ee8d422c91
10 changed files with 171 additions and 173 deletions
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@ -100,17 +100,17 @@ unevaluatedProperties: false
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examples:
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- |
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spi@c1108d80 {
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compatible = "amlogic,meson-gx-spicc";
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reg = <0xc1108d80 0x80>;
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interrupts = <112>;
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clocks = <&clk81>;
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clock-names = "core";
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "amlogic,meson-gx-spicc";
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reg = <0xc1108d80 0x80>;
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interrupts = <112>;
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clocks = <&clk81>;
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clock-names = "core";
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#address-cells = <1>;
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#size-cells = <0>;
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display@0 {
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compatible = "lg,lg4573";
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spi-max-frequency = <1000000>;
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reg = <0>;
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};
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display@0 {
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compatible = "lg,lg4573";
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spi-max-frequency = <1000000>;
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reg = <0>;
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};
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};
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@ -40,15 +40,15 @@ unevaluatedProperties: false
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examples:
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- |
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spi@c1108c80 {
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compatible = "amlogic,meson6-spifc";
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reg = <0xc1108c80 0x80>;
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clocks = <&clk81>;
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "amlogic,meson6-spifc";
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reg = <0xc1108c80 0x80>;
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clocks = <&clk81>;
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#address-cells = <1>;
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#size-cells = <0>;
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flash: flash@0 {
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compatible = "spansion,m25p80", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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};
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flash: flash@0 {
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compatible = "spansion,m25p80", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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};
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};
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@ -60,23 +60,23 @@ examples:
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interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
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flash@0 {
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reg = < 0 >;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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spi-rx-bus-width = <2>;
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reg = < 0 >;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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spi-rx-bus-width = <2>;
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};
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flash@1 {
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reg = < 1 >;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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spi-rx-bus-width = <2>;
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reg = < 1 >;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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spi-rx-bus-width = <2>;
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};
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flash@2 {
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reg = < 2 >;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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spi-rx-bus-width = <2>;
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reg = < 2 >;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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spi-rx-bus-width = <2>;
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};
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};
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@ -99,98 +99,98 @@ required:
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examples:
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- | # BRCMSTB SoC: SPI Master (MSPI+BSPI) for SPI-NOR access
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spi@f03e3400 {
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compatible = "brcm,spi-brcmstb-qspi", "brcm,spi-bcm-qspi";
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reg = <0xf03e3400 0x188>, <0xf03e3200 0x50>, <0xf03e0920 0x4>;
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reg-names = "mspi", "bspi", "cs_reg";
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interrupts = <0x5>, <0x6>, <0x1>, <0x2>, <0x3>, <0x4>, <0x0>;
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interrupt-parent = <&gic>;
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interrupt-names = "mspi_done",
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"mspi_halted",
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"spi_lr_fullness_reached",
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"spi_lr_session_aborted",
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"spi_lr_impatient",
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"spi_lr_session_done",
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"spi_lr_overread";
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clocks = <&hif_spi>;
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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compatible = "brcm,spi-brcmstb-qspi", "brcm,spi-bcm-qspi";
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reg = <0xf03e3400 0x188>, <0xf03e3200 0x50>, <0xf03e0920 0x4>;
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reg-names = "mspi", "bspi", "cs_reg";
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interrupts = <0x5>, <0x6>, <0x1>, <0x2>, <0x3>, <0x4>, <0x0>;
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interrupt-parent = <&gic>;
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interrupt-names = "mspi_done",
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"mspi_halted",
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"spi_lr_fullness_reached",
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"spi_lr_session_aborted",
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"spi_lr_impatient",
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"spi_lr_session_done",
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"spi_lr_overread";
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clocks = <&hif_spi>;
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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flash@0 {
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#size-cells = <0x2>;
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#address-cells = <0x2>;
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compatible = "m25p80";
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reg = <0x0>;
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spi-max-frequency = <0x2625a00>;
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spi-cpol;
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spi-cpha;
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};
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flash@0 {
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#size-cells = <0x2>;
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#address-cells = <0x2>;
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compatible = "m25p80";
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reg = <0x0>;
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spi-max-frequency = <0x2625a00>;
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spi-cpol;
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spi-cpha;
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};
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};
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- | # BRCMSTB SoC: MSPI master for any SPI device
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spi@f0416000 {
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clocks = <&upg_fixed>;
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compatible = "brcm,spi-brcmstb-mspi", "brcm,spi-bcm-qspi";
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reg = <0xf0416000 0x180>;
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reg-names = "mspi";
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interrupts = <0x14>;
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interrupt-parent = <&irq0_aon_intc>;
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interrupt-names = "mspi_done";
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&upg_fixed>;
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compatible = "brcm,spi-brcmstb-mspi", "brcm,spi-bcm-qspi";
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reg = <0xf0416000 0x180>;
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reg-names = "mspi";
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interrupts = <0x14>;
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interrupt-parent = <&irq0_aon_intc>;
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interrupt-names = "mspi_done";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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- | # iProc SoC
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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spi@18027200 {
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compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
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reg = <0x18027200 0x184>,
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<0x18027000 0x124>,
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<0x1811c408 0x004>,
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<0x180273a0 0x01c>;
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reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg";
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interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "mspi_done",
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"mspi_halted",
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"spi_lr_fullness_reached",
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"spi_lr_session_aborted",
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"spi_lr_impatient",
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"spi_lr_session_done";
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clocks = <&iprocmed>;
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num-cs = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
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reg = <0x18027200 0x184>,
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<0x18027000 0x124>,
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<0x1811c408 0x004>,
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<0x180273a0 0x01c>;
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reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg";
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interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "mspi_done",
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"mspi_halted",
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"spi_lr_fullness_reached",
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"spi_lr_session_aborted",
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"spi_lr_impatient",
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"spi_lr_session_done";
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clocks = <&iprocmed>;
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num-cs = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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- | # NS2 SoC
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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spi@66470200 {
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compatible = "brcm,spi-ns2-qspi", "brcm,spi-bcm-qspi";
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reg = <0x66470200 0x184>,
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<0x66470000 0x124>,
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<0x67017408 0x004>,
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<0x664703a0 0x01c>;
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reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg";
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interrupts = <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "spi_l1_intr";
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clocks = <&iprocmed>;
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num-cs = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,spi-ns2-qspi", "brcm,spi-bcm-qspi";
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reg = <0x66470200 0x184>,
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<0x66470000 0x124>,
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<0x67017408 0x004>,
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<0x664703a0 0x01c>;
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reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg";
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interrupts = <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "spi_l1_intr";
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clocks = <&iprocmed>;
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num-cs = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "m25p80";
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reg = <0x0>;
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spi-max-frequency = <12500000>;
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spi-cpol;
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spi-cpha;
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};
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "m25p80";
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reg = <0x0>;
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spi-max-frequency = <12500000>;
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spi-cpol;
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spi-cpha;
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};
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};
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@ -103,21 +103,21 @@ unevaluatedProperties: false
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examples:
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- |
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qspi: spi@ff705000 {
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compatible = "cdns,qspi-nor";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xff705000 0x1000>,
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<0xffa00000 0x1000>;
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interrupts = <0 151 4>;
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clocks = <&qspi_clk>;
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cdns,fifo-depth = <128>;
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cdns,fifo-width = <4>;
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cdns,trigger-address = <0x00000000>;
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resets = <&rst 0x1>, <&rst 0x2>;
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reset-names = "qspi", "qspi-ocp";
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compatible = "cdns,qspi-nor";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xff705000 0x1000>,
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<0xffa00000 0x1000>;
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interrupts = <0 151 4>;
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clocks = <&qspi_clk>;
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cdns,fifo-depth = <128>;
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cdns,fifo-width = <4>;
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cdns,trigger-address = <0x00000000>;
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resets = <&rst 0x1>, <&rst 0x2>;
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reset-names = "qspi", "qspi-ocp";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0x0>;
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};
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0x0>;
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};
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};
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@ -74,25 +74,25 @@ examples:
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#include <dt-bindings/reset/tegra210-car.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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spi@70410000 {
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compatible = "nvidia,tegra210-qspi";
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reg = <0x70410000 0x1000>;
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interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car TEGRA210_CLK_QSPI>,
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<&tegra_car TEGRA210_CLK_QSPI_PM>;
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clock-names = "qspi", "qspi_out";
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resets = <&tegra_car 211>;
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dmas = <&apbdma 5>, <&apbdma 5>;
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dma-names = "rx", "tx";
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compatible = "nvidia,tegra210-qspi";
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reg = <0x70410000 0x1000>;
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interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&tegra_car TEGRA210_CLK_QSPI>,
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<&tegra_car TEGRA210_CLK_QSPI_PM>;
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clock-names = "qspi", "qspi_out";
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resets = <&tegra_car 211>;
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dmas = <&apbdma 5>, <&apbdma 5>;
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dma-names = "rx", "tx";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <104000000>;
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spi-tx-bus-width = <2>;
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spi-rx-bus-width = <2>;
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nvidia,tx-clk-tap-delay = <0>;
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nvidia,rx-clk-tap-delay = <0>;
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};
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <104000000>;
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spi-tx-bus-width = <2>;
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spi-rx-bus-width = <2>;
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nvidia,tx-clk-tap-delay = <0>;
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nvidia,rx-clk-tap-delay = <0>;
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};
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};
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@ -87,7 +87,6 @@ examples:
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spi-tx-bus-width = <2>;
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spi-rx-bus-width = <2>;
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};
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};
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};
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...
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@ -141,15 +141,15 @@ examples:
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#include <dt-bindings/power/r8a7791-sysc.h>
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qspi: spi@e6b10000 {
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compatible = "renesas,qspi-r8a7791", "renesas,qspi";
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reg = <0xe6b10000 0x2c>;
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interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 917>;
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dmas = <&dmac0 0x17>, <&dmac0 0x18>, <&dmac1 0x17>, <&dmac1 0x18>;
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dma-names = "tx", "rx", "tx", "rx";
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power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
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resets = <&cpg 917>;
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,qspi-r8a7791", "renesas,qspi";
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reg = <0xe6b10000 0x2c>;
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interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 917>;
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dmas = <&dmac0 0x17>, <&dmac0 0x18>, <&dmac1 0x17>, <&dmac1 0x18>;
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dma-names = "tx", "rx", "tx", "rx";
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power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
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resets = <&cpg 917>;
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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@ -59,9 +59,9 @@ unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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spi@9C002D80 {
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spi@9c002d80 {
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compatible = "sunplus,sp7021-spi";
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reg = <0x9C002D80 0x80>, <0x9C002E00 0x80>;
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reg = <0x9c002d80 0x80>, <0x9c002e00 0x80>;
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reg-names = "master", "slave";
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interrupt-parent = <&intc>;
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interrupt-names = "dma_w",
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||||
|
|
|
|||
|
|
@ -84,18 +84,17 @@ examples:
|
|||
#include <dt-bindings/clock/stm32mp1-clks.h>
|
||||
#include <dt-bindings/reset/stm32mp1-resets.h>
|
||||
spi@4000b000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "st,stm32h7-spi";
|
||||
reg = <0x4000b000 0x400>;
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&rcc SPI2_K>;
|
||||
resets = <&rcc SPI2_R>;
|
||||
dmas = <&dmamux1 0 39 0x400 0x05>,
|
||||
<&dmamux1 1 40 0x400 0x05>;
|
||||
dma-names = "rx", "tx";
|
||||
cs-gpios = <&gpioa 11 0>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "st,stm32h7-spi";
|
||||
reg = <0x4000b000 0x400>;
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&rcc SPI2_K>;
|
||||
resets = <&rcc SPI2_R>;
|
||||
dmas = <&dmamux1 0 39 0x400 0x05>,
|
||||
<&dmamux1 1 40 0x400 0x05>;
|
||||
dma-names = "rx", "tx";
|
||||
cs-gpios = <&gpioa 11 0>;
|
||||
};
|
||||
|
||||
...
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue