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powerpc: Remove flush_instruction_cache for book3s/32
The only callers of flush_instruction_cache() are: arch/powerpc/kernel/swsusp_booke.S: bl flush_instruction_cache arch/powerpc/mm/nohash/40x.c: flush_instruction_cache(); arch/powerpc/mm/nohash/44x.c: flush_instruction_cache(); arch/powerpc/mm/nohash/fsl_booke.c: flush_instruction_cache(); arch/powerpc/platforms/44x/machine_check.c: flush_instruction_cache(); arch/powerpc/platforms/44x/machine_check.c: flush_instruction_cache(); This function is not used by book3s/32, drop it. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/50098f49877cea0f46730a9df82dcabf84160e4b.1597384512.git.christophe.leroy@csgroup.eu
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parent
9d6792ffe1
commit
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1 changed files with 2 additions and 10 deletions
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@ -258,9 +258,8 @@ _ASM_NOKPROBE_SYMBOL(real_writeb)
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/*
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* Flush instruction cache.
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* This is a no-op on the 601.
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*/
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#ifndef CONFIG_PPC_8xx
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#if !defined(CONFIG_PPC_8xx) && !defined(CONFIG_PPC_BOOK3S_32)
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_GLOBAL(flush_instruction_cache)
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#if defined(CONFIG_4xx)
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lis r3, KERNELBASE@h
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@ -277,18 +276,11 @@ _GLOBAL(flush_instruction_cache)
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mfspr r3,SPRN_L1CSR1
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ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR
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mtspr SPRN_L1CSR1,r3
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#elif defined(CONFIG_PPC_BOOK3S_601)
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blr /* for 601, do nothing */
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#else
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/* 603/604 processor - use invalidate-all bit in HID0 */
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mfspr r3,SPRN_HID0
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ori r3,r3,HID0_ICFI
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mtspr SPRN_HID0,r3
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#endif /* CONFIG_4xx */
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isync
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blr
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EXPORT_SYMBOL(flush_instruction_cache)
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#endif /* CONFIG_PPC_8xx */
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#endif
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/*
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* Copy a whole page. We use the dcbz instruction on the destination
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