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habanalabs: add user available interrupt to hw_ip
In order to support completions that arrive directly to the user, the driver needs to supply the user with the first available msix interrupt available. Signed-off-by: Ofir Bitton <obitton@habana.ai> Reviewed-by: Oded Gabbay <ogabbay@kernel.org> Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
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8d79ce162e
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5 changed files with 13 additions and 2 deletions
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@ -408,6 +408,8 @@ struct hl_mmu_properties {
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* @sync_stream_first_mon: first monitor available for sync stream use
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* @first_available_user_sob: first sob available for the user
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* @first_available_user_mon: first monitor available for the user
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* @first_available_user_msix_interrupt: first available msix interrupt
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* reserved for the user
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* @tpc_enabled_mask: which TPCs are enabled.
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* @completion_queues_count: number of completion queues.
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* @fw_security_disabled: true if security measures are disabled in firmware,
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@ -469,6 +471,7 @@ struct asic_fixed_properties {
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u16 sync_stream_first_mon;
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u16 first_available_user_sob[HL_MAX_DCORES];
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u16 first_available_user_mon[HL_MAX_DCORES];
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u16 first_available_user_msix_interrupt;
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u8 tpc_enabled_mask;
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u8 completion_queues_count;
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u8 fw_security_disabled;
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@ -90,6 +90,8 @@ static int hw_ip_info(struct hl_device *hdev, struct hl_info_args *args)
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hw_ip.psoc_pci_pll_od = prop->psoc_pci_pll_od;
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hw_ip.psoc_pci_pll_div_factor = prop->psoc_pci_pll_div_factor;
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hw_ip.first_available_interrupt_id =
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prop->first_available_user_msix_interrupt;
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return copy_to_user(out, &hw_ip,
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min((size_t)size, sizeof(hw_ip))) ? -EFAULT : 0;
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}
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@ -527,6 +527,8 @@ static int gaudi_get_fixed_properties(struct hl_device *hdev)
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prop->sync_stream_first_mon +
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(num_sync_stream_queues * HL_RSVD_MONS);
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prop->first_available_user_msix_interrupt = USHRT_MAX;
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/* disable fw security for now, set it in a later stage */
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prop->fw_security_disabled = true;
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prop->fw_security_status_valid = false;
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@ -455,6 +455,8 @@ int goya_get_fixed_properties(struct hl_device *hdev)
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prop->max_pending_cs = GOYA_MAX_PENDING_CS;
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prop->first_available_user_msix_interrupt = USHRT_MAX;
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/* disable fw security for now, set it in a later stage */
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prop->fw_security_disabled = true;
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prop->fw_security_status_valid = false;
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@ -309,7 +309,9 @@ struct hl_info_hw_ip_info {
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__u32 num_of_events;
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__u32 device_id; /* PCI Device ID */
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__u32 module_id; /* For mezzanine cards in servers (From OCP spec.) */
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__u32 reserved[2];
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__u32 reserved;
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__u16 first_available_interrupt_id;
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__u16 reserved2;
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__u32 cpld_version;
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__u32 psoc_pci_pll_nr;
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__u32 psoc_pci_pll_nf;
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@ -320,7 +322,7 @@ struct hl_info_hw_ip_info {
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__u8 pad[2];
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__u8 cpucp_version[HL_INFO_VERSION_MAX_LEN];
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__u8 card_name[HL_INFO_CARD_NAME_MAX_LEN];
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__u64 reserved2;
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__u64 reserved3;
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__u64 dram_page_size;
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};
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