public-mirrors/linux
1
0
Fork 0
mirror of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2025-08-05 16:54:27 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

drm/amdgpu: Drop unnecessary return statements

Browse source 
There is no reason to call return at the end of function that
returns void.

Fixes the below:

WARNING: void function return statements are not generally useful

Thus remove such a statement in the affected functions.

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Srinivasan Shanmugam 2023-09-30 08:11:31 +05:30 • committed by Alex Deucher
parent 4798db85b7
commit e0a3e7bf62
9 changed files with 0 additions and 21 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
View file

@ -112,7 +112,6 @@ fallback:
cur->remaining = size;
cur->node = NULL;
WARN_ON(res && start + size > res->size);
return;
}
/**

1
drivers/gpu/drm/amd/amdgpu/atombios_encoders.c
View file

@ -228,7 +228,6 @@ error:
register_acpi_backlight:
/* Try registering an ACPI video backlight device instead. */
acpi_video_register_backlight();
return;
}
void

2
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
View file

@ -746,8 +746,6 @@ void gfx_v9_4_2_init_golden_registers(struct amdgpu_device *adev,
die_id);
break;
}
return;
}
void gfx_v9_4_2_debug_trap_config_init(struct amdgpu_device *adev,

4
drivers/gpu/drm/amd/amdgpu/ih_v6_0.c
View file

@ -641,8 +641,6 @@ static void ih_v6_0_update_clockgating_state(struct amdgpu_device *adev,
if (def != data)
WREG32_SOC15(OSSSYS, 0, regIH_CLK_CTRL, data);
}
return;
}
static int ih_v6_0_set_clockgating_state(void *handle,
@ -726,8 +724,6 @@ static void ih_v6_0_get_clockgating_state(void *handle, u64 *flags)
if (!RREG32_SOC15(OSSSYS, 0, regIH_CLK_CTRL))
*flags |= AMD_CG_SUPPORT_IH_CG;
return;
}
static const struct amd_ip_funcs ih_v6_0_ip_funcs = {

4
drivers/gpu/drm/amd/amdgpu/navi10_ih.c
View file

@ -665,8 +665,6 @@ static void navi10_ih_update_clockgating_state(struct amdgpu_device *adev,
if (def != data)
WREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL, data);
}
return;
}
static int navi10_ih_set_clockgating_state(void *handle,
@ -691,8 +689,6 @@ static void navi10_ih_get_clockgating_state(void *handle, u64 *flags)
if (!RREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL))
*flags |= AMD_CG_SUPPORT_IH_CG;
return;
}
static const struct amd_ip_funcs navi10_ih_ip_funcs = {

3
drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
View file

@ -173,8 +173,6 @@ static void nbio_v7_9_sdma_doorbell_range(struct amdgpu_device *adev, int instan
default:
break;
}
return;
}
static void nbio_v7_9_vcn_doorbell_range(struct amdgpu_device *adev, bool use_doorbell,
@ -556,7 +554,6 @@ const struct amdgpu_nbio_funcs nbio_v7_9_funcs = {
static void nbio_v7_9_query_ras_error_count(struct amdgpu_device *adev,
void *ras_error_status)
{
return;
}
static void nbio_v7_9_handle_ras_controller_intr_no_bifring(struct amdgpu_device *adev)

2
drivers/gpu/drm/amd/amdgpu/nv.c
View file

@ -1115,8 +1115,6 @@ static void nv_common_get_clockgating_state(void *handle, u64 *flags)
adev->hdp.funcs->get_clock_gating_state(adev, flags);
adev->smuio.funcs->get_clock_gating_state(adev, flags);
return;
}
static const struct amd_ip_funcs nv_common_ip_funcs = {

2
drivers/gpu/drm/amd/amdgpu/soc21.c
View file

@ -885,8 +885,6 @@ static void soc21_common_get_clockgating_state(void *handle, u64 *flags)
adev->nbio.funcs->get_clockgating_state(adev, flags);
adev->hdp.funcs->get_clock_gating_state(adev, flags);
return;
}
static const struct amd_ip_funcs soc21_common_ip_funcs = {

2
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
View file

@ -877,8 +877,6 @@ static void vcn_v4_0_enable_clock_gating(struct amdgpu_device *adev, int inst)
| UVD_SUVD_CGC_CTRL__IME_MODE_MASK
| UVD_SUVD_CGC_CTRL__SITE_MODE_MASK);
WREG32_SOC15(VCN, inst, regUVD_SUVD_CGC_CTRL, data);
return;
}
static void vcn_v4_0_enable_ras(struct amdgpu_device *adev, int inst_idx,