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ath10k: improve warm reset reliability
Warm reset is now able to recover after device crashes which required a cold reset before. This should greatly reduce chances of getting data bus errors or host system freezes due to buggy cold reset on some chips. kvalo: use ath10k_pci_soc_*() Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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1 changed files with 22 additions and 0 deletions
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@ -1802,6 +1802,26 @@ static void ath10k_pci_fw_interrupt_handler(struct ath10k *ar)
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ath10k_pci_sleep(ar);
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}
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/* this function effectively clears target memory controller assert line */
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static void ath10k_pci_warm_reset_si0(struct ath10k *ar)
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{
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u32 val;
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val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS);
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ath10k_pci_soc_write32(ar, SOC_RESET_CONTROL_ADDRESS,
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val | SOC_RESET_CONTROL_SI0_RST_MASK);
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val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS);
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msleep(10);
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val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS);
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ath10k_pci_soc_write32(ar, SOC_RESET_CONTROL_ADDRESS,
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val & ~SOC_RESET_CONTROL_SI0_RST_MASK);
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val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS);
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msleep(10);
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}
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static int ath10k_pci_warm_reset(struct ath10k *ar)
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{
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int ret = 0;
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@ -1860,6 +1880,8 @@ static int ath10k_pci_warm_reset(struct ath10k *ar)
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SOC_RESET_CONTROL_ADDRESS);
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msleep(10);
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ath10k_pci_warm_reset_si0(ar);
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/* debug */
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val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
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PCIE_INTR_CAUSE_ADDRESS);
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