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riscv: dts: sophgo: sg2044: Add MMC controller device
Add emmc controller and sd controller DT node for SG2044. Link: https://lore.kernel.org/r/20250608232836.784737-7-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
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@ -27,6 +27,23 @@
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clock-frequency = <25000000>;
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clock-frequency = <25000000>;
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};
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};
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&emmc {
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bus-width = <4>;
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no-sdio;
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no-sd;
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non-removable;
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wp-inverted;
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status = "okay";
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};
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&sd {
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bus-width = <4>;
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no-sdio;
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no-mmc;
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wp-inverted;
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status = "okay";
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};
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&uart1 {
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&uart1 {
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status = "okay";
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status = "okay";
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};
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};
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@ -111,6 +111,30 @@
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status = "disabled";
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status = "disabled";
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};
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};
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emmc: mmc@703000a000 {
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compatible = "sophgo,sg2044-dwcmshc", "sophgo,sg2042-dwcmshc";
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reg = <0x70 0x3000a000 0x0 0x1000>;
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clocks = <&clk CLK_GATE_EMMC>,
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<&clk CLK_GATE_AXI_EMMC>,
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<&clk CLK_GATE_EMMC_100K>;
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clock-names = "core", "bus", "timer";
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interrupt-parent = <&intc>;
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interrupts = <298 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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sd: mmc@703000b000 {
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compatible = "sophgo,sg2044-dwcmshc", "sophgo,sg2042-dwcmshc";
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reg = <0x70 0x3000b000 0x0 0x1000>;
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clocks = <&clk CLK_GATE_SD>,
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<&clk CLK_GATE_AXI_SD>,
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<&clk CLK_GATE_SD_100K>;
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clock-names = "core", "bus", "timer";
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interrupt-parent = <&intc>;
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interrupts = <300 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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i2c0: i2c@7040005000 {
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i2c0: i2c@7040005000 {
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compatible = "sophgo,sg2044-i2c", "snps,designware-i2c";
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compatible = "sophgo,sg2044-i2c", "snps,designware-i2c";
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reg = <0x70 0x40005000 0x0 0x1000>;
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reg = <0x70 0x40005000 0x0 0x1000>;
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