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Documentation/gpu: Add new entries to amdgpu glossary
Add some additional entries. Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -24,6 +24,9 @@ we have a dedicated glossary for Display Core at
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CIK
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Sea Islands
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CB
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Color Buffer
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CP
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Command Processor
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@ -39,6 +42,9 @@ we have a dedicated glossary for Display Core at
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CU
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Compute Unit
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DB
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Depth Buffer
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DFS
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Digital Frequency Synthesizer
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@ -63,6 +69,12 @@ we have a dedicated glossary for Display Core at
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GC
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Graphics and Compute
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GDS
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Global Data Share
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GE
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Geometry Engine
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GMC
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Graphic Memory Controller
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@ -128,6 +140,9 @@ we have a dedicated glossary for Display Core at
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MQD
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Memory Queue Descriptor
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PA
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Primitive Assembler / Physical Address
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PFP
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Pre-Fetch Parser (Graphics)
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@ -146,6 +161,9 @@ we have a dedicated glossary for Display Core at
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the GFX block. It's involved in GFX power management and SR-IOV, among
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other things.
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SC
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Scan Converter
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SDMA
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System DMA
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@ -164,6 +182,9 @@ we have a dedicated glossary for Display Core at
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SMU/SMC
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System Management Unit / System Management Controller
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SPI
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Shader Processor Input
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SRLC
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Save/Restore List Control
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@ -176,6 +197,9 @@ we have a dedicated glossary for Display Core at
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SS
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Spread Spectrum
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SX
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Shader Export
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TA
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Trusted Application
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@ -185,6 +209,9 @@ we have a dedicated glossary for Display Core at
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TOC
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Table of Contents
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UMSCH
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User Mode Scheduler
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UVD
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Unified Video Decoder
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@ -202,3 +229,9 @@ we have a dedicated glossary for Display Core at
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VPE
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Video Processing Engine
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XCC
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Accelerator Core Complex
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XCP
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Accelerator Core Partition
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