Documentation/gpu: Add new entries to amdgpu glossary

Add some additional entries.

Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rodrigo Siqueira 2025-05-03 14:38:43 -06:00 committed by Alex Deucher
parent c8305c6327
commit dd3d035a78

View file

@ -24,6 +24,9 @@ we have a dedicated glossary for Display Core at
CIK
Sea Islands
CB
Color Buffer
CP
Command Processor
@ -39,6 +42,9 @@ we have a dedicated glossary for Display Core at
CU
Compute Unit
DB
Depth Buffer
DFS
Digital Frequency Synthesizer
@ -63,6 +69,12 @@ we have a dedicated glossary for Display Core at
GC
Graphics and Compute
GDS
Global Data Share
GE
Geometry Engine
GMC
Graphic Memory Controller
@ -128,6 +140,9 @@ we have a dedicated glossary for Display Core at
MQD
Memory Queue Descriptor
PA
Primitive Assembler / Physical Address
PFP
Pre-Fetch Parser (Graphics)
@ -146,6 +161,9 @@ we have a dedicated glossary for Display Core at
the GFX block. It's involved in GFX power management and SR-IOV, among
other things.
SC
Scan Converter
SDMA
System DMA
@ -164,6 +182,9 @@ we have a dedicated glossary for Display Core at
SMU/SMC
System Management Unit / System Management Controller
SPI
Shader Processor Input
SRLC
Save/Restore List Control
@ -176,6 +197,9 @@ we have a dedicated glossary for Display Core at
SS
Spread Spectrum
SX
Shader Export
TA
Trusted Application
@ -185,6 +209,9 @@ we have a dedicated glossary for Display Core at
TOC
Table of Contents
UMSCH
User Mode Scheduler
UVD
Unified Video Decoder
@ -202,3 +229,9 @@ we have a dedicated glossary for Display Core at
VPE
Video Processing Engine
XCC
Accelerator Core Complex
XCP
Accelerator Core Partition