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arm64: dts: apple: Add PMIC NVMEM

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Add device tree entries for NVMEM cells present on the PMIC

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Nick Chan <towinchenmi@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Co-developed-by: Sasha Finkelstein <fnkl.kernel@gmail.com>
Signed-off-by: Sasha Finkelstein <fnkl.kernel@gmail.com>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Link: https://lore.kernel.org/r/20250423-spmi-nvmem-v3-3-2985aa722ddc@gmail.com
Signed-off-by: Sven Peter <sven@svenpeter.dev>
This commit is contained in:
Hector Martin 2025-04-23 19:55:15 +02:00 • committed by Sven Peter
parent 2e0e70c950
commit d8bf82081c
5 changed files with 152 additions and 0 deletions
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1
arch/arm64/boot/dts/apple/t6001.dtsi
View file

@ -11,6 +11,7 @@
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/apple.h>
#include <dt-bindings/spmi/spmi.h>
#include "multi-die-cpp.h"

1
arch/arm64/boot/dts/apple/t6002.dtsi
View file

@ -11,6 +11,7 @@
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/apple.h>
#include <dt-bindings/spmi/spmi.h>
#include "multi-die-cpp.h"

50
arch/arm64/boot/dts/apple/t600x-die0.dtsi
View file

@ -50,6 +50,56 @@
reg = <0x2 0x920a1300 0x0 0x100>;
#address-cells = <2>;
#size-cells = <0>;
pmic1: pmic@f {
compatible = "apple,maverick-pmic", "apple,spmi-nvmem";
reg = <0xf SPMI_USID>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
pm_setting: pm-setting@1405 {
reg = <0x1405 0x1>;
};
rtc_offset: rtc-offset@1411 {
reg = <0x1411 0x6>;
};
boot_stage: boot-stage@6001 {
reg = <0x6001 0x1>;
};
boot_error_count: boot-error-count@6002 {
reg = <0x6002 0x1>;
bits = <0 4>;
};
panic_count: panic-count@6002 {
reg = <0x6002 0x1>;
bits = <4 4>;
};
boot_error_stage: boot-error-stage@6003 {
reg = <0x6003 0x1>;
};
shutdown_flag: shutdown-flag@600f {
reg = <0x600f 0x1>;
bits = <3 1>;
};
fault_shadow: fault-shadow@867b {
reg = <0x867b 0x10>;
};
socd: socd@8b00 {
reg = <0x8b00 0x400>;
};
};
};
};
wdt: watchdog@2922b0000 {

50
arch/arm64/boot/dts/apple/t8103.dtsi
View file

@ -747,6 +747,56 @@
reg = <0x2 0x3d0d9300 0x0 0x100>;
#address-cells = <2>;
#size-cells = <0>;
pmic1: pmic@f {
compatible = "apple,sera-pmic", "apple,spmi-nvmem";
reg = <0xf SPMI_USID>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
boot_stage: boot-stage@9f01 {
reg = <0x9f01 0x1>;
};
boot_error_count: boot-error-count@9f02 {
reg = <0x9f02 0x1>;
bits = <0 4>;
};
panic_count: panic-count@9f02 {
reg = <0x9f02 0x1>;
bits = <4 4>;
};
boot_error_stage: boot-error-stage@9f03 {
reg = <0x9f03 0x1>;
};
shutdown_flag: shutdown-flag@9f0f {
reg = <0x9f0f 0x1>;
bits = <3 1>;
};
fault_shadow: fault-shadow@a67b {
reg = <0xa67b 0x10>;
};
socd: socd@ab00 {
reg = <0xab00 0x400>;
};
pm_setting: pm-setting@d001 {
reg = <0xd001 0x1>;
};
rtc_offset: rtc-offset@d100 {
reg = <0xd100 0x6>;
};
};
};
};
pinctrl_nub: pinctrl@23d1f0000 {

50
arch/arm64/boot/dts/apple/t8112.dtsi
View file

@ -787,6 +787,56 @@
reg = <0x2 0x3d714000 0x0 0x100>;
#address-cells = <2>;
#size-cells = <0>;
pmic1: pmic@e {
compatible = "apple,stowe-pmic", "apple,spmi-nvmem";
reg = <0xe SPMI_USID>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
fault_shadow: fault-shadow@867b {
reg = <0x867b 0x10>;
};
socd: socd@8b00 {
reg = <0x8b00 0x400>;
};
boot_stage: boot-stage@f701 {
reg = <0xf701 0x1>;
};
boot_error_count: boot-error-count@f702 {
reg = <0xf702 0x1>;
bits = <0 4>;
};
panic_count: panic-count@f702 {
reg = <0xf702 0x1>;
bits = <4 4>;
};
boot_error_stage: boot-error-stage@f703 {
reg = <0xf703 0x1>;
};
shutdown_flag: shutdown-flag@f70f {
reg = <0xf70f 0x1>;
bits = <3 1>;
};
pm_setting: pm-setting@f801 {
reg = <0xf801 0x1>;
};
rtc_offset: rtc-offset@f900 {
reg = <0xf900 0x6>;
};
};
};
};
pinctrl_smc: pinctrl@23e820000 {