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drm/i915/gtt: Introduce i915_page_dir_dma_addr

Browse source 
The legacy mode mm switch and the execlist context assignment
needs dma address for the page directories.

Introduce a function that encapsulates the scratch_pd dma
fallback if no pd is found.

v2: Rebase, s/ring/req

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Michel Thierry <michel.thierry@intel.com> (v1)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Mika Kuoppala 2015-06-25 18:35:06 +03:00 • committed by Daniel Vetter
parent c44ef60e43
commit d852c7bf90
3 changed files with 11 additions and 7 deletions
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6
drivers/gpu/drm/i915/i915_gem_gtt.c
View file

@ -482,10 +482,8 @@ static int gen8_mm_switch(struct i915_hw_ppgtt *ppgtt,
int i, ret; int i, ret;
for (i = GEN8_LEGACY_PDPES - 1; i >= 0; i--) { for (i = GEN8_LEGACY_PDPES - 1; i >= 0; i--) {
struct i915_page_directory *pd = ppgtt->pdp.page_directory[i]; const dma_addr_t pd_daddr = i915_page_dir_dma_addr(ppgtt, i);
dma_addr_t pd_daddr = pd ? pd->daddr : ppgtt->scratch_pd->daddr;
/* The page directory might be NULL, but we need to clear out
* whatever the previous context might have used. */
ret = gen8_write_pdp(req, i, pd_daddr); ret = gen8_write_pdp(req, i, pd_daddr);
if (ret) if (ret)
return ret; return ret;

8
drivers/gpu/drm/i915/i915_gem_gtt.h
View file

@ -470,6 +470,14 @@ static inline size_t gen8_pte_count(uint64_t address, uint64_t length)
return i915_pte_count(address, length, GEN8_PDE_SHIFT); return i915_pte_count(address, length, GEN8_PDE_SHIFT);
} }
static inline dma_addr_t
i915_page_dir_dma_addr(const struct i915_hw_ppgtt *ppgtt, const unsigned n)
{
return test_bit(n, ppgtt->pdp.used_pdpes) ?
ppgtt->pdp.page_directory[n]->daddr :
ppgtt->scratch_pd->daddr;
}
int i915_gem_gtt_init(struct drm_device *dev); int i915_gem_gtt_init(struct drm_device *dev);
void i915_gem_init_global_gtt(struct drm_device *dev); void i915_gem_init_global_gtt(struct drm_device *dev);
void i915_global_gtt_cleanup(struct drm_device *dev); void i915_global_gtt_cleanup(struct drm_device *dev);

4
drivers/gpu/drm/i915/intel_lrc.c
View file

@ -190,9 +190,7 @@
#define GEN8_CTX_PRIVILEGE (1<<8) #define GEN8_CTX_PRIVILEGE (1<<8)
#define ASSIGN_CTX_PDP(ppgtt, reg_state, n) { \ #define ASSIGN_CTX_PDP(ppgtt, reg_state, n) { \
const u64 _addr = test_bit(n, ppgtt->pdp.used_pdpes) ? \ const u64 _addr = i915_page_dir_dma_addr((ppgtt), (n)); \
ppgtt->pdp.page_directory[n]->daddr : \
ppgtt->scratch_pd->daddr; \
reg_state[CTX_PDP ## n ## _UDW+1] = upper_32_bits(_addr); \ reg_state[CTX_PDP ## n ## _UDW+1] = upper_32_bits(_addr); \
reg_state[CTX_PDP ## n ## _LDW+1] = lower_32_bits(_addr); \ reg_state[CTX_PDP ## n ## _LDW+1] = lower_32_bits(_addr); \
} }