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arm64: dts: exynos: add initial devicetree support for exynos7870
Exynos7870 is an arm64 SoC manufactured by Samsung and announced in 2016. It is present in multiple mid-range Samsung phones and tablets. Add basic devicetree support for the SoC, which includes CMUs, pin controllers, I2C, UART, DW-MMC, and USB-DRD. Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Link: https://lore.kernel.org/r/20250501-exynos7870-v7-2-bb579a27e5eb@disroot.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Kaustabh Chakraborty
Krzysztof Kozlowski
parent
004bd8536c
commit
d6f3a7f91f
2 changed files with 1733 additions and 0 deletions
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arch/arm64/boot/dts/exynos/exynos7870-pinctrl.dtsi
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1021
arch/arm64/boot/dts/exynos/exynos7870-pinctrl.dtsi
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File diff suppressed because it is too large
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arch/arm64/boot/dts/exynos/exynos7870.dtsi
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arch/arm64/boot/dts/exynos/exynos7870.dtsi
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Samsung Exynos7870 SoC device tree source
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*
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* Copyright (c) 2015 Samsung Electronics Co., Ltd.
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* Copyright (c) 2025 Kaustabh Chakraborty <kauschluss@disroot.org>
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*/
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#include <dt-bindings/clock/samsung,exynos7870-cmu.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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compatible = "samsung,exynos7870";
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#address-cells = <2>;
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#size-cells = <1>;
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interrupt-parent = <&gic>;
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aliases {
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pinctrl0 = &pinctrl_alive;
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pinctrl1 = &pinctrl_dispaud;
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pinctrl2 = &pinctrl_ese;
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pinctrl3 = &pinctrl_fsys;
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pinctrl4 = &pinctrl_mif;
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pinctrl5 = &pinctrl_nfc;
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pinctrl6 = &pinctrl_top;
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pinctrl7 = &pinctrl_touch;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu-map {
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cluster0 {
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core0 {
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cpu = <&cpu0>;
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};
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core1 {
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cpu = <&cpu1>;
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};
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core2 {
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cpu = <&cpu2>;
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};
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core3 {
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cpu = <&cpu3>;
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};
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};
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cluster1 {
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core0 {
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cpu = <&cpu4>;
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};
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core1 {
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cpu = <&cpu5>;
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};
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core2 {
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cpu = <&cpu6>;
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};
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core3 {
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cpu = <&cpu7>;
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};
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};
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};
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0>;
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enable-method = "psci";
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x1>;
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enable-method = "psci";
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};
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cpu2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x2>;
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enable-method = "psci";
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};
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cpu3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x3>;
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enable-method = "psci";
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};
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cpu4: cpu@100 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x100>;
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enable-method = "psci";
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};
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cpu5: cpu@101 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x101>;
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enable-method = "psci";
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};
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cpu6: cpu@102 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x102>;
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enable-method = "psci";
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};
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cpu7: cpu@103 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x103>;
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enable-method = "psci";
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};
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};
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oscclk: oscclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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};
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psci {
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compatible = "arm,psci";
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method = "smc";
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cpu_suspend = <0xc4000001>;
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cpu_off = <0x84000002>;
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cpu_on = <0xc4000003>;
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};
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soc: soc@0 {
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compatible = "simple-bus";
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ranges = <0x0 0x0 0x0 0x20000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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chipid@10100000 {
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compatible = "samsung,exynos7870-chipid",
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"samsung,exynos4210-chipid";
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reg = <0x10100000 0x100>;
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};
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cmu_peri: clock-controller@101f0000 {
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compatible = "samsung,exynos7870-cmu-peri";
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reg = <0x101f0000 0x1000>;
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#clock-cells = <1>;
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clock-names = "oscclk", "bus", "spi0", "spi1", "spi2",
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"spi3", "spi4", "uart0", "uart1", "uart2";
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clocks = <&oscclk>,
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<&cmu_mif CLK_GOUT_MIF_CMU_PERI_BUS>,
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<&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI0>,
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<&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI1>,
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<&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI2>,
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<&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI3>,
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<&cmu_mif CLK_GOUT_MIF_CMU_PERI_SPI4>,
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<&cmu_mif CLK_GOUT_MIF_CMU_PERI_UART0>,
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<&cmu_mif CLK_GOUT_MIF_CMU_PERI_UART1>,
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<&cmu_mif CLK_GOUT_MIF_CMU_PERI_UART2>;
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};
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cmu_mif: clock-controller@10460000 {
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compatible = "samsung,exynos7870-cmu-mif";
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reg = <0x10460000 0x1000>;
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#clock-cells = <1>;
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clock-names = "oscclk";
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clocks = <&oscclk>;
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};
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pmu_system_controller: system-controller@10480000 {
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compatible = "samsung,exynos7870-pmu",
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"samsung,exynos7-pmu", "syscon";
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reg = <0x10480000 0x10000>;
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reboot-mode {
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compatible = "syscon-reboot-mode";
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offset = <0x080c>;
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mode-bootloader = <0x1234567d>;
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mode-download = <0x12345671>;
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mode-recovery = <0x12345674>;
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};
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};
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gic: interrupt-controller@104e1000 {
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compatible = "arm,cortex-a15-gic";
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reg = <0x104e1000 0x1000>,
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<0x104e2000 0x1000>,
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<0x104e4000 0x2000>,
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<0x104e6000 0x2000>;
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(8) |
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IRQ_TYPE_LEVEL_HIGH)>;
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <3>;
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};
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hsi2c0: i2c@10510000 {
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compatible = "samsung,exynos7870-hsi2c",
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"samsung,exynos7-hsi2c";
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reg = <0x10510000 0x2000>;
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interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&hsi2c0_bus>;
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clock-names = "hsi2c";
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clocks = <&cmu_mif CLK_GOUT_MIF_HSI2C_IPCLK>;
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status = "disabled";
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};
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pinctrl_mif: pinctrl@10530000 {
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compatible = "samsung,exynos7870-pinctrl";
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reg = <0x10530000 0x1000>;
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interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>;
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};
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gpu: gpu@11400000 {
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compatible = "samsung,exynos7870-mali", "arm,mali-t830";
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reg = <0x11400000 0x5000>;
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interrupt-names = "job", "mmu", "gpu";
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interrupts = <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "core", "bus";
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clocks = <&cmu_g3d CLK_GOUT_G3D_CLK>,
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<&cmu_g3d CLK_GOUT_G3D_ASYNCS_D0_CLK>;
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status = "disabled";
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};
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cmu_g3d: clock-controller@11460000 {
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compatible = "samsung,exynos7870-cmu-g3d";
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reg = <0x11460000 0x1000>;
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#clock-cells = <1>;
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clock-names = "oscclk", "switch";
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clocks = <&oscclk>,
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<&cmu_mif CLK_GOUT_MIF_CMU_G3D_SWITCH>;
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};
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cmu_mfcmscl: clock-controller@12cb0000 {
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compatible = "samsung,exynos7870-cmu-mfcmscl";
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reg = <0x12cb0000 0x1000>;
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#clock-cells = <1>;
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clock-names = "oscclk", "mfc", "mscl";
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clocks = <&oscclk>,
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<&cmu_mif CLK_GOUT_MIF_CMU_MFCMSCL_MFC>,
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<&cmu_mif CLK_GOUT_MIF_CMU_MFCMSCL_MSCL>;
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};
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mmc0: mmc@13540000 {
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compatible = "samsung,exynos7870-dw-mshc-smu";
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reg = <0x13540000 0x2000>;
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interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "biu", "ciu";
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clocks = <&cmu_fsys CLK_GOUT_FSYS_MMC0_ACLK>,
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<&cmu_mif CLK_GOUT_MIF_CMU_FSYS_MMC0>;
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status = "disabled";
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};
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mmc1: mmc@13550000 {
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compatible = "samsung,exynos7870-dw-mshc-smu";
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reg = <0x13550000 0x2000>;
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interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "biu", "ciu";
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clocks = <&cmu_fsys CLK_GOUT_FSYS_MMC1_ACLK>,
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<&cmu_mif CLK_GOUT_MIF_CMU_FSYS_MMC1>;
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status = "disabled";
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};
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mmc2: mmc@13560000 {
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compatible = "samsung,exynos7870-dw-mshc-smu";
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reg = <0x13560000 0x2000>;
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interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "biu", "ciu";
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clocks = <&cmu_fsys CLK_GOUT_FSYS_MMC2_ACLK>,
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<&cmu_mif CLK_GOUT_MIF_CMU_FSYS_MMC2>;
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status = "disabled";
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};
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usbdrd_phy: phy@135c0000 {
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compatible = "samsung,exynos7870-usbdrd-phy";
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reg = <0x135c0000 0x100>;
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#phy-cells = <1>;
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clock-names = "phy", "ref";
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clocks = <&cmu_fsys CLK_GOUT_FSYS_MUX_USB20DRD_PHYCLOCK_USER>,
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<&cmu_fsys CLK_GOUT_FSYS_MUX_USB_PLL>;
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samsung,pmu-syscon = <&pmu_system_controller>;
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};
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usbdrd: usb@13600000 {
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compatible = "samsung,exynos7870-dwusb3";
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ranges = <0x0 0x13600000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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clock-names = "bus_early", "ref", "ctrl";
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clocks = <&cmu_fsys CLK_GOUT_FSYS_USB20DRD_ACLK_HSDRD>,
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<&cmu_fsys CLK_GOUT_FSYS_USB20DRD_HSDRD_REF_CLK>,
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<&cmu_fsys CLK_GOUT_FSYS_USB20DRD_HCLK_USB20_CTRL>;
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status = "disabled";
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usb@0 {
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compatible = "snps,dwc3";
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reg = <0x0 0x10000>;
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interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>;
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phy-names = "usb2-phy";
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phys = <&usbdrd_phy 0>;
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usb-role-switch;
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};
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};
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cmu_fsys: clock-controller@13730000 {
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compatible = "samsung,exynos7870-cmu-fsys";
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reg = <0x13730000 0x1000>;
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#clock-cells = <1>;
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clock-names = "oscclk", "bus", "usb20drd";
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clocks = <&oscclk>,
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<&cmu_mif CLK_GOUT_MIF_CMU_FSYS_BUS>,
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<&cmu_mif CLK_GOUT_MIF_CMU_FSYS_USB20DRD_REFCLK>;
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};
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pinctrl_fsys: pinctrl@13750000 {
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compatible = "samsung,exynos7870-pinctrl";
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reg = <0x13750000 0x1000>;
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interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>;
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};
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serial0: serial@13800000 {
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compatible = "samsung,exynos7870-uart",
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"samsung,exynos8895-uart";
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reg = <0x13800000 0x100>;
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interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_bus>;
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clock-names = "uart", "clk_uart_baud0";
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clocks = <&cmu_peri CLK_GOUT_PERI_UART0_PCLK>,
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<&cmu_peri CLK_GOUT_PERI_UART0_EXT_UCLK>;
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samsung,uart-fifosize = <16>;
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status = "disabled";
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};
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serial1: serial@13810000 {
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compatible = "samsung,exynos7870-uart",
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"samsung,exynos8895-uart";
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reg = <0x13810000 0x100>;
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interrupts = <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_bus>;
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clock-names = "uart", "clk_uart_baud0";
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clocks = <&cmu_peri CLK_GOUT_PERI_UART1_PCLK>,
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<&cmu_peri CLK_GOUT_PERI_UART1_EXT_UCLK>;
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samsung,uart-fifosize = <256>;
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status = "disabled";
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};
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serial2: serial@13820000 {
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compatible = "samsung,exynos7870-uart",
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"samsung,exynos8895-uart";
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reg = <0x13820000 0x100>;
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interrupts = <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_bus>;
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clock-names = "uart", "clk_uart_baud0";
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clocks = <&cmu_peri CLK_GOUT_PERI_UART2_PCLK>,
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<&cmu_peri CLK_GOUT_PERI_UART2_EXT_UCLK>;
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samsung,uart-fifosize = <256>;
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status = "disabled";
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};
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i2c0: i2c@13830000 {
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compatible = "samsung,exynos7870-i2c",
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"samsung,s3c2440-i2c";
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reg = <0x13830000 0x100>;
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interrupts = <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_bus>;
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clock-names = "i2c";
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clocks = <&cmu_peri CLK_GOUT_PERI_I2C0_PCLK>;
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status = "disabled";
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};
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i2c1: i2c@13840000 {
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compatible = "samsung,exynos7870-i2c",
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"samsung,s3c2440-i2c";
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reg = <0x13840000 0x100>;
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interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_bus>;
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clock-names = "i2c";
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clocks = <&cmu_peri CLK_GOUT_PERI_I2C1_PCLK>;
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status = "disabled";
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};
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i2c2: i2c@13850000 {
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compatible = "samsung,exynos7870-i2c",
|
||||
"samsung,s3c2440-i2c";
|
||||
reg = <0x13850000 0x100>;
|
||||
interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_bus>;
|
||||
|
||||
clock-names = "i2c";
|
||||
clocks = <&cmu_peri CLK_GOUT_PERI_I2C2_PCLK>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c3: i2c@13860000 {
|
||||
compatible = "samsung,exynos7870-i2c",
|
||||
"samsung,s3c2440-i2c";
|
||||
reg = <0x13860000 0x100>;
|
||||
interrupts = <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3_bus>;
|
||||
|
||||
clock-names = "i2c";
|
||||
clocks = <&cmu_peri CLK_GOUT_PERI_I2C3_PCLK>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c4: i2c@13870000 {
|
||||
compatible = "samsung,exynos7870-i2c",
|
||||
"samsung,s3c2440-i2c";
|
||||
reg = <0x13870000 0x100>;
|
||||
interrupts = <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c4_bus>;
|
||||
|
||||
clock-names = "i2c";
|
||||
clocks = <&cmu_peri CLK_GOUT_PERI_I2C4_PCLK>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c5: i2c@13880000 {
|
||||
compatible = "samsung,exynos7870-i2c",
|
||||
"samsung,s3c2440-i2c";
|
||||
reg = <0x13880000 0x100>;
|
||||
interrupts = <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c5_bus>;
|
||||
|
||||
clock-names = "i2c";
|
||||
clocks = <&cmu_peri CLK_GOUT_PERI_I2C5_PCLK>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c6: i2c@13890000 {
|
||||
compatible = "samsung,exynos7870-i2c",
|
||||
"samsung,s3c2440-i2c";
|
||||
reg = <0x13890000 0x100>;
|
||||
interrupts = <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c6_bus>;
|
||||
|
||||
clock-names = "i2c";
|
||||
clocks = <&cmu_peri CLK_GOUT_PERI_I2C6_PCLK>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsi2c1: i2c@138a0000 {
|
||||
compatible = "samsung,exynos7870-hsi2c",
|
||||
"samsung,exynos7-hsi2c";
|
||||
reg = <0x138a0000 0x1000>;
|
||||
interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hsi2c1_bus>;
|
||||
|
||||
clock-names = "hsi2c";
|
||||
clocks = <&cmu_peri CLK_GOUT_PERI_HSI2C1_IPCLK>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsi2c2: i2c@138b0000 {
|
||||
compatible = "samsung,exynos7870-hsi2c",
|
||||
"samsung,exynos7-hsi2c";
|
||||
reg = <0x138b0000 0x1000>;
|
||||
interrupts = <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hsi2c2_bus>;
|
||||
|
||||
clock-names = "hsi2c";
|
||||
clocks = <&cmu_peri CLK_GOUT_PERI_HSI2C2_IPCLK>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsi2c3: i2c@138c0000 {
|
||||
compatible = "samsung,exynos7870-hsi2c",
|
||||
"samsung,exynos7-hsi2c";
|
||||
reg = <0x138c0000 0x1000>;
|
||||
interrupts = <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hsi2c3_bus>;
|
||||
|
||||
clock-names = "hsi2c";
|
||||
clocks = <&cmu_peri CLK_GOUT_PERI_HSI2C3_IPCLK>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c7: i2c@138d0000 {
|
||||
compatible = "samsung,exynos7870-i2c",
|
||||
"samsung,s3c2440-i2c";
|
||||
reg = <0x138d0000 0x100>;
|
||||
interrupts = <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c7_bus>;
|
||||
|
||||
clock-names = "i2c";
|
||||
clocks = <&cmu_peri CLK_GOUT_PERI_I2C7_PCLK>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c8: i2c@138e0000 {
|
||||
compatible = "samsung,exynos7870-i2c",
|
||||
"samsung,s3c2440-i2c";
|
||||
reg = <0x138e0000 0x100>;
|
||||
interrupts = <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c8_bus>;
|
||||
|
||||
clock-names = "i2c";
|
||||
clocks = <&cmu_peri CLK_GOUT_PERI_I2C8_PCLK>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsi2c4: i2c@138f0000 {
|
||||
compatible = "samsung,exynos7870-hsi2c",
|
||||
"samsung,exynos7-hsi2c";
|
||||
reg = <0x138f0000 0x1000>;
|
||||
interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hsi2c4_bus>;
|
||||
|
||||
clock-names = "hsi2c";
|
||||
clocks = <&cmu_peri CLK_GOUT_PERI_HSI2C4_IPCLK>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsi2c5: i2c@13950000 {
|
||||
compatible = "samsung,exynos7870-hsi2c",
|
||||
"samsung,exynos7-hsi2c";
|
||||
reg = <0x13950000 0x1000>;
|
||||
interrupts = <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hsi2c5_bus>;
|
||||
|
||||
clock-names = "hsi2c";
|
||||
clocks = <&cmu_peri CLK_GOUT_PERI_HSI2C5_IPCLK>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hsi2c6: i2c@13960000 {
|
||||
compatible = "samsung,exynos7870-hsi2c",
|
||||
"samsung,exynos7-hsi2c";
|
||||
reg = <0x13960000 0x1000>;
|
||||
interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hsi2c6_bus>;
|
||||
|
||||
clock-names = "hsi2c";
|
||||
clocks = <&cmu_peri CLK_GOUT_PERI_HSI2C6_IPCLK>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pinctrl_top: pinctrl@139b0000 {
|
||||
compatible = "samsung,exynos7870-pinctrl";
|
||||
reg = <0x139b0000 0x1000>;
|
||||
interrupts = <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
pinctrl_nfc: pinctrl@139c0000 {
|
||||
compatible = "samsung,exynos7870-pinctrl";
|
||||
reg = <0x139c0000 0x1000>;
|
||||
interrupts = <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
pinctrl_touch: pinctrl@139d0000 {
|
||||
compatible = "samsung,exynos7870-pinctrl";
|
||||
reg = <0x139d0000 0x1000>;
|
||||
interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
pinctrl_ese: pinctrl@139e0000 {
|
||||
compatible = "samsung,exynos7870-pinctrl";
|
||||
reg = <0x139e0000 0x1000>;
|
||||
interrupts = <GIC_SPI 441 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
pinctrl_alive: pinctrl@139f0000 {
|
||||
compatible = "samsung,exynos7870-pinctrl";
|
||||
reg = <0x139f0000 0x1000>;
|
||||
|
||||
wakeup-interrupt-controller {
|
||||
compatible = "samsung,exynos7870-wakeup-eint",
|
||||
"samsung,exynos7-wakeup-eint";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
cmu_isp: clock-controller@144d0000 {
|
||||
compatible = "samsung,exynos7870-cmu-isp";
|
||||
reg = <0x144d0000 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
|
||||
clock-names = "oscclk", "cam", "isp", "vra";
|
||||
clocks = <&oscclk>,
|
||||
<&cmu_mif CLK_GOUT_MIF_CMU_ISP_CAM>,
|
||||
<&cmu_mif CLK_GOUT_MIF_CMU_ISP_ISP>,
|
||||
<&cmu_mif CLK_GOUT_MIF_CMU_ISP_VRA>;
|
||||
};
|
||||
|
||||
pinctrl_dispaud: pinctrl@148c0000 {
|
||||
compatible = "samsung,exynos7870-pinctrl";
|
||||
reg = <0x148c0000 0x1000>;
|
||||
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
cmu_dispaud: clock-controller@148d0000 {
|
||||
compatible = "samsung,exynos7870-cmu-dispaud";
|
||||
reg = <0x148d0000 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
|
||||
clock-names = "oscclk", "bus", "decon_eclk", "decon_vclk";
|
||||
clocks = <&oscclk>,
|
||||
<&cmu_mif CLK_GOUT_MIF_CMU_DISPAUD_BUS>,
|
||||
<&cmu_mif CLK_GOUT_MIF_CMU_DISPAUD_DECON_ECLK>,
|
||||
<&cmu_mif CLK_GOUT_MIF_CMU_DISPAUD_DECON_VCLK>;
|
||||
};
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
|
||||
|
||||
/*
|
||||
* Non-updatable, broken stock Samsung bootloader does not
|
||||
* configure CNTFRQ_EL0
|
||||
*/
|
||||
clock-frequency = <26000000>;
|
||||
};
|
||||
};
|
||||
|
||||
#include "exynos7870-pinctrl.dtsi"
|
||||
#include "arm/samsung/exynos-syscon-restart.dtsi"
|
||||
Loading…
Add table
Reference in a new issue