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bnxt_en: Consolidate DB offset calculation
The doorbell offset on P5 chips is hard coded. On the new P7 chips, it is returned by the firmware. Simplify the logic that determines this offset and store it in a new db_offset field in struct bnxt. Also, provide this offset to the RoCE driver in struct bnxt_en_dev. Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com> Signed-off-by: Hongguang Gao <hongguang.gao@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Link: https://lore.kernel.org/r/20231201223924.26955-5-michael.chan@broadcom.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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4 changed files with 16 additions and 15 deletions
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@ -6031,10 +6031,6 @@ static void bnxt_set_db(struct bnxt *bp, struct bnxt_db_info *db, u32 ring_type,
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u32 map_idx, u32 xid)
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{
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if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {
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if (BNXT_PF(bp))
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db->doorbell = bp->bar1 + DB_PF_OFFSET_P5;
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else
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db->doorbell = bp->bar1 + DB_VF_OFFSET_P5;
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switch (ring_type) {
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case HWRM_RING_ALLOC_TX:
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db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SQ;
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@ -6054,6 +6050,8 @@ static void bnxt_set_db(struct bnxt *bp, struct bnxt_db_info *db, u32 ring_type,
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if (bp->flags & BNXT_FLAG_CHIP_P7)
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db->db_key64 |= DBR_VALID;
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db->doorbell = bp->bar1 + bp->db_offset;
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} else {
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db->doorbell = bp->bar1 + map_idx * 0x80;
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switch (ring_type) {
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@ -7146,7 +7144,6 @@ static int bnxt_hwrm_func_qcfg(struct bnxt *bp)
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{
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struct hwrm_func_qcfg_output *resp;
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struct hwrm_func_qcfg_input *req;
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u32 min_db_offset = 0;
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u16 flags;
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int rc;
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@ -7204,16 +7201,17 @@ static int bnxt_hwrm_func_qcfg(struct bnxt *bp)
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if (bp->db_size)
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goto func_qcfg_exit;
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if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {
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bp->db_offset = le16_to_cpu(resp->legacy_l2_db_size_kb) * 1024;
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if (BNXT_CHIP_P5(bp)) {
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if (BNXT_PF(bp))
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min_db_offset = DB_PF_OFFSET_P5;
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bp->db_offset = DB_PF_OFFSET_P5;
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else
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min_db_offset = DB_VF_OFFSET_P5;
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bp->db_offset = DB_VF_OFFSET_P5;
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}
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bp->db_size = PAGE_ALIGN(le16_to_cpu(resp->l2_doorbell_bar_size_kb) *
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1024);
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if (!bp->db_size || bp->db_size > pci_resource_len(bp->pdev, 2) ||
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bp->db_size <= min_db_offset)
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bp->db_size <= bp->db_offset)
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bp->db_size = pci_resource_len(bp->pdev, 2);
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func_qcfg_exit:
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@ -2216,6 +2216,7 @@ struct bnxt {
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/* ensure atomic 64-bit doorbell writes on 32-bit systems. */
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spinlock_t db_lock;
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#endif
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int db_offset; /* db_offset within db_size */
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int db_size;
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#define BNXT_NTP_FLTR_MAX_FLTR 4096
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@ -42,13 +42,10 @@ static void bnxt_fill_msix_vecs(struct bnxt *bp, struct bnxt_msix_entry *ent)
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for (i = 0; i < num_msix; i++) {
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ent[i].vector = bp->irq_tbl[idx + i].vector;
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ent[i].ring_idx = idx + i;
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if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS) {
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ent[i].db_offset = DB_PF_OFFSET_P5;
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if (BNXT_VF(bp))
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ent[i].db_offset = DB_VF_OFFSET_P5;
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} else {
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if (bp->flags & BNXT_FLAG_CHIP_P5_PLUS)
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ent[i].db_offset = bp->db_offset;
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else
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ent[i].db_offset = (idx + i) * 0x80;
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}
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}
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}
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@ -333,6 +330,7 @@ static void bnxt_set_edev_info(struct bnxt_en_dev *edev, struct bnxt *bp)
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edev->pdev = bp->pdev;
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edev->l2_db_size = bp->db_size;
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edev->l2_db_size_nc = bp->db_size;
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edev->l2_db_offset = bp->db_offset;
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if (bp->flags & BNXT_FLAG_ROCEV1_CAP)
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edev->flags |= BNXT_EN_FLAG_ROCEV1_CAP;
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@ -73,6 +73,10 @@ struct bnxt_en_dev {
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* bytes mapped as non-
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* cacheable.
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*/
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int l2_db_offset; /* Doorbell offset in
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* bytes within
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* l2_db_size_nc.
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*/
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u16 chip_num;
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u16 hw_ring_stats_size;
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u16 pf_port_id;
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