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misc: amd-sbi: Add support for register xfer
- Provide user register access over IOCTL. Both register read and write are supported. - APML interface does not provide a synchronization method. By defining, a register access path, we use APML modules and library for all APML transactions. Without having to use external tools such as i2c-tools, which may cause race conditions. Reviewed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com> Signed-off-by: Akshay Gupta <akshay.gupta@amd.com> Link: https://lore.kernel.org/r/20250428063034.2145566-10-akshay.gupta@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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2 changed files with 60 additions and 0 deletions
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@ -350,6 +350,33 @@ exit_unlock:
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return ret;
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return ret;
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}
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}
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static int apml_rmi_reg_xfer(struct sbrmi_data *data,
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struct apml_reg_xfer_msg __user *arg)
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{
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struct apml_reg_xfer_msg msg = { 0 };
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unsigned int data_read;
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int ret;
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/* Copy the structure from user */
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if (copy_from_user(&msg, arg, sizeof(struct apml_reg_xfer_msg)))
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return -EFAULT;
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mutex_lock(&data->lock);
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if (msg.rflag) {
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ret = regmap_read(data->regmap, msg.reg_addr, &data_read);
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if (!ret)
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msg.data_in_out = data_read;
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} else {
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ret = regmap_write(data->regmap, msg.reg_addr, msg.data_in_out);
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}
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mutex_unlock(&data->lock);
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if (msg.rflag && !ret)
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return copy_to_user(arg, &msg, sizeof(struct apml_reg_xfer_msg));
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return ret;
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}
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static int apml_mailbox_xfer(struct sbrmi_data *data, struct apml_mbox_msg __user *arg)
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static int apml_mailbox_xfer(struct sbrmi_data *data, struct apml_mbox_msg __user *arg)
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{
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{
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struct apml_mbox_msg msg = { 0 };
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struct apml_mbox_msg msg = { 0 };
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@ -414,6 +441,8 @@ static long sbrmi_ioctl(struct file *fp, unsigned int cmd, unsigned long arg)
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return apml_cpuid_xfer(data, argp);
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return apml_cpuid_xfer(data, argp);
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case SBRMI_IOCTL_MCAMSR_CMD:
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case SBRMI_IOCTL_MCAMSR_CMD:
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return apml_mcamsr_xfer(data, argp);
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return apml_mcamsr_xfer(data, argp);
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case SBRMI_IOCTL_REG_XFER_CMD:
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return apml_rmi_reg_xfer(data, argp);
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default:
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default:
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return -ENOTTY;
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return -ENOTTY;
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}
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}
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@ -58,6 +58,21 @@ struct apml_mcamsr_msg {
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__u32 pad;
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__u32 pad;
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};
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};
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struct apml_reg_xfer_msg {
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/*
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* RMI register address offset
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*/
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__u16 reg_addr;
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/*
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* Register data for read/write
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*/
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__u8 data_in_out;
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/*
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* Register read or write
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*/
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__u8 rflag;
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};
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/*
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/*
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* AMD sideband interface base IOCTL
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* AMD sideband interface base IOCTL
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*/
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*/
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@ -118,4 +133,20 @@ struct apml_mcamsr_msg {
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*/
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*/
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#define SBRMI_IOCTL_MCAMSR_CMD _IOWR(SB_BASE_IOCTL_NR, 2, struct apml_mcamsr_msg)
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#define SBRMI_IOCTL_MCAMSR_CMD _IOWR(SB_BASE_IOCTL_NR, 2, struct apml_mcamsr_msg)
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/**
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* DOC: SBRMI_IOCTL_REG_XFER_CMD
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*
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* @Parameters
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*
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* @struct apml_reg_xfer_msg
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* Pointer to the &struct apml_reg_xfer_msg that will contain the protocol
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* information
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*
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* @Description
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* IOCTL command for APML messages using generic _IOWR
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* The IOCTL provides userspace access to AMD sideband register xfer protocol
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* - Register xfer protocol to get/set hardware register for given offset
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*/
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#define SBRMI_IOCTL_REG_XFER_CMD _IOWR(SB_BASE_IOCTL_NR, 3, struct apml_reg_xfer_msg)
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#endif /*_AMD_APML_H_*/
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#endif /*_AMD_APML_H_*/
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