public-mirrors/linux
1
0
Fork 0
mirror of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2025-10-31 16:54:21 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

drm/panel: samsung-s6e88a0-ams452ef01: transition to mipi_dsi wrapped functions

Browse source 
Changes the samsung-s6e88a0-ams452ef01 panel to use multi style functions
for improved error handling.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Tejas Vipin <tejasvipin76@gmail.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20250122031110.286079-1-tejasvipin76@gmail.com
This commit is contained in:
Tejas Vipin 2025-01-22 08:41:10 +05:30 • committed by Douglas Anderson
parent 7f3b11934f
commit ce8c69ec90
1 changed files with 31 additions and 60 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

91
drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c
View file

@ -39,91 +39,66 @@ static void s6e88a0_ams452ef01_reset(struct s6e88a0_ams452ef01 *ctx)
static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx)
{
struct mipi_dsi_device *dsi = ctx->dsi;
struct device *dev = &dsi->dev;
int ret;
struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };
dsi->mode_flags |= MIPI_DSI_MODE_LPM;
mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands
mipi_dsi_dcs_write_seq(dsi, 0xcc, 0x4c); // set Pixel Clock Divider polarity
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xcc, 0x4c); // set Pixel Clock Divider polarity
ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
if (ret < 0) {
dev_err(dev, "Failed to exit sleep mode: %d\n", ret);
return ret;
}
msleep(120);
mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
mipi_dsi_msleep(&dsi_ctx, 120);
// set default brightness/gama
mipi_dsi_dcs_write_seq(dsi, 0xca,
0x01, 0x00, 0x01, 0x00, 0x01, 0x00, // V255 RR,GG,BB
0x80, 0x80, 0x80, // V203 R,G,B
0x80, 0x80, 0x80, // V151 R,G,B
0x80, 0x80, 0x80, // V87 R,G,B
0x80, 0x80, 0x80, // V51 R,G,B
0x80, 0x80, 0x80, // V35 R,G,B
0x80, 0x80, 0x80, // V23 R,G,B
0x80, 0x80, 0x80, // V11 R,G,B
0x6b, 0x68, 0x71, // V3 R,G,B
0x00, 0x00, 0x00); // V1 R,G,B
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xca,
0x01, 0x00, 0x01, 0x00, 0x01, 0x00,// V255 RR,GG,BB
0x80, 0x80, 0x80, // V203 R,G,B
0x80, 0x80, 0x80, // V151 R,G,B
0x80, 0x80, 0x80, // V87 R,G,B
0x80, 0x80, 0x80, // V51 R,G,B
0x80, 0x80, 0x80, // V35 R,G,B
0x80, 0x80, 0x80, // V23 R,G,B
0x80, 0x80, 0x80, // V11 R,G,B
0x6b, 0x68, 0x71, // V3 R,G,B
0x00, 0x00, 0x00); // V1 R,G,B
// set default Amoled Off Ratio
mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x40, 0x0a, 0x17, 0x00, 0x0a);
mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x2c, 0x0b); // set default elvss voltage
mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
mipi_dsi_dcs_write_seq(dsi, 0xf7, 0x03); // gamma/aor update
mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); // disable LEVEL2 commands
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x40, 0x0a, 0x17, 0x00, 0x0a);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0x2c, 0x0b); // set default elvss voltage
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf7, 0x03); // gamma/aor update
mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5); // disable LEVEL2 commands
ret = mipi_dsi_dcs_set_display_on(dsi);
if (ret < 0) {
dev_err(dev, "Failed to set display on: %d\n", ret);
return ret;
}
mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
return 0;
return dsi_ctx.accum_err;
}
static int s6e88a0_ams452ef01_off(struct s6e88a0_ams452ef01 *ctx)
static void s6e88a0_ams452ef01_off(struct s6e88a0_ams452ef01 *ctx)
{
struct mipi_dsi_device *dsi = ctx->dsi;
struct device *dev = &dsi->dev;
int ret;
struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi};
dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
ret = mipi_dsi_dcs_set_display_off(dsi);
if (ret < 0) {
dev_err(dev, "Failed to set display off: %d\n", ret);
return ret;
}
msleep(35);
ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
if (ret < 0) {
dev_err(dev, "Failed to enter sleep mode: %d\n", ret);
return ret;
}
msleep(120);
return 0;
mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
mipi_dsi_msleep(&dsi_ctx, 35);
mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
mipi_dsi_msleep(&dsi_ctx, 120);
}
static int s6e88a0_ams452ef01_prepare(struct drm_panel *panel)
{
struct s6e88a0_ams452ef01 *ctx = to_s6e88a0_ams452ef01(panel);
struct device *dev = &ctx->dsi->dev;
int ret;
ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
if (ret < 0) {
dev_err(dev, "Failed to enable regulators: %d\n", ret);
if (ret < 0)
return ret;
}
s6e88a0_ams452ef01_reset(ctx);
ret = s6e88a0_ams452ef01_on(ctx);
if (ret < 0) {
dev_err(dev, "Failed to initialize panel: %d\n", ret);
gpiod_set_value_cansleep(ctx->reset_gpio, 0);
regulator_bulk_disable(ARRAY_SIZE(ctx->supplies),
ctx->supplies);
@ -136,12 +111,8 @@ static int s6e88a0_ams452ef01_prepare(struct drm_panel *panel)
static int s6e88a0_ams452ef01_unprepare(struct drm_panel *panel)
{
struct s6e88a0_ams452ef01 *ctx = to_s6e88a0_ams452ef01(panel);
struct device *dev = &ctx->dsi->dev;
int ret;
ret = s6e88a0_ams452ef01_off(ctx);
if (ret < 0)
dev_err(dev, "Failed to un-initialize panel: %d\n", ret);
s6e88a0_ams452ef01_off(ctx);
gpiod_set_value_cansleep(ctx->reset_gpio, 0);
regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);