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drm/amdgpu: implement hdp v4_0 ras functions

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implement hdp v4_0 ras functions, including
ras init/fini, query/reset_error_counter

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: John Clements <John.Clements@amd.com>
Reviewed-by: Dennis Li <Dennis.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Hawking Zhang 2021-04-28 22:59:14 +08:00 • committed by Alex Deucher
parent b11625f56f
commit ca81b26d21
2 changed files with 29 additions and 2 deletions
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26
drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c
View file

@ -59,10 +59,29 @@ static void hdp_v4_0_invalidate_hdp(struct amdgpu_device *adev,
HDP, 0, mmHDP_READ_CACHE_INVALIDATE), 1); HDP, 0, mmHDP_READ_CACHE_INVALIDATE), 1);
} }
static void hdp_v4_0_query_ras_error_count(struct amdgpu_device *adev,
void *ras_error_status)
{
struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status;
err_data->ue_count = 0;
err_data->ce_count = 0;
if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__HDP))
return;
/* HDP SRAM errors are uncorrectable ones (i.e. fatal errors) */
err_data->ue_count += RREG32_SOC15(HDP, 0, mmHDP_EDC_CNT);
};
static void hdp_v4_0_reset_ras_error_count(struct amdgpu_device *adev) static void hdp_v4_0_reset_ras_error_count(struct amdgpu_device *adev)
{ {
if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__HDP)) if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__HDP))
return; return;
if (adev->asic_type >= CHIP_ALDEBARAN)
WREG32_SOC15(HDP, 0, mmHDP_EDC_CNT, 0);
else
/*read back hdp ras counter to reset it to 0 */ /*read back hdp ras counter to reset it to 0 */
RREG32_SOC15(HDP, 0, mmHDP_EDC_CNT); RREG32_SOC15(HDP, 0, mmHDP_EDC_CNT);
} }
@ -130,6 +149,13 @@ static void hdp_v4_0_init_registers(struct amdgpu_device *adev)
WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40)); WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
} }
const struct amdgpu_hdp_ras_funcs hdp_v4_0_ras_funcs = {
.ras_late_init = amdgpu_hdp_ras_late_init,
.ras_fini = amdgpu_hdp_ras_fini,
.query_ras_error_count = hdp_v4_0_query_ras_error_count,
.reset_ras_error_count = hdp_v4_0_reset_ras_error_count,
};
const struct amdgpu_hdp_funcs hdp_v4_0_funcs = { const struct amdgpu_hdp_funcs hdp_v4_0_funcs = {
.flush_hdp = hdp_v4_0_flush_hdp, .flush_hdp = hdp_v4_0_flush_hdp,
.invalidate_hdp = hdp_v4_0_invalidate_hdp, .invalidate_hdp = hdp_v4_0_invalidate_hdp,

1
drivers/gpu/drm/amd/amdgpu/hdp_v4_0.h
View file

@ -27,5 +27,6 @@
#include "soc15_common.h" #include "soc15_common.h"
extern const struct amdgpu_hdp_funcs hdp_v4_0_funcs; extern const struct amdgpu_hdp_funcs hdp_v4_0_funcs;
extern const struct amdgpu_hdp_ras_funcs hdp_v4_0_ras_funcs;
#endif #endif