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fbdev/matroxfb: Remove trailing whitespaces
Fix coding style. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Helge Deller <deller@gmx.de> Link: https://lore.kernel.org/r/20250612081738.197826-6-tzimmermann@suse.de
This commit is contained in:
Thomas Zimmermann
parent
3bb0aeb60a
commit
c70993bcd5
4 changed files with 75 additions and 75 deletions
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@ -258,13 +258,13 @@ static inline unsigned int g450_findworkingpll(struct matrox_fb_info *minfo,
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unsigned int found = 0;
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unsigned int idx;
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unsigned int mnpfound = mnparray[0];
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for (idx = 0; idx < mnpcount; idx++) {
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unsigned int sarray[3];
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unsigned int *sptr;
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{
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unsigned int mnp;
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sptr = sarray;
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mnp = mnparray[idx];
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if (mnp & 0x38) {
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@ -277,7 +277,7 @@ static inline unsigned int g450_findworkingpll(struct matrox_fb_info *minfo,
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}
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while (sptr >= sarray) {
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unsigned int mnp = *sptr--;
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if (g450_testpll(minfo, mnp - 0x0300, pll) &&
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g450_testpll(minfo, mnp + 0x0300, pll) &&
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g450_testpll(minfo, mnp - 0x0200, pll) &&
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@ -310,12 +310,12 @@ static int g450_checkcache(struct matrox_fb_info *minfo,
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struct matrox_pll_cache *ci, unsigned int mnp_key)
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{
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unsigned int i;
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mnp_key &= G450_MNP_FREQBITS;
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for (i = 0; i < ci->valid; i++) {
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if (ci->data[i].mnp_key == mnp_key) {
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unsigned int mnp;
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mnp = ci->data[i].mnp_value;
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if (i) {
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memmove(ci->data + 1, ci->data, i * sizeof(*ci->data));
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@ -343,7 +343,7 @@ static int __g450_setclk(struct matrox_fb_info *minfo, unsigned int fout,
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{
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u_int8_t tmp, xpwrctrl;
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unsigned long flags;
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matroxfb_DAC_lock_irqsave(flags);
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xpwrctrl = matroxfb_DAC_in(minfo, M1064_XPWRCTRL);
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@ -375,7 +375,7 @@ static int __g450_setclk(struct matrox_fb_info *minfo, unsigned int fout,
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}
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{
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u_int8_t misc;
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misc = mga_inb(M_MISC_REG_READ) & ~0x0C;
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switch (pll) {
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case M_PIXEL_PLL_A:
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@ -409,13 +409,13 @@ static int __g450_setclk(struct matrox_fb_info *minfo, unsigned int fout,
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u_int8_t tmp;
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unsigned int mnp;
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unsigned long flags;
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matroxfb_DAC_lock_irqsave(flags);
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tmp = matroxfb_DAC_in(minfo, M1064_XPWRCTRL);
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if (!(tmp & 2)) {
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matroxfb_DAC_out(minfo, M1064_XPWRCTRL, tmp | 2);
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}
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mnp = matroxfb_DAC_in(minfo, M1064_XPIXPLLCM) << 16;
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mnp |= matroxfb_DAC_in(minfo, M1064_XPIXPLLCN) << 8;
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matroxfb_DAC_unlock_irqrestore(flags);
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@ -441,7 +441,7 @@ static int __g450_setclk(struct matrox_fb_info *minfo, unsigned int fout,
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delta = pll_freq_delta(fout, g450_vco2f(mnp, vco));
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for (idx = mnpcount; idx > 0; idx--) {
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/* == is important; due to nextpll algorithm we get
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sorted equally good frequencies from lower VCO
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sorted equally good frequencies from lower VCO
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frequency to higher - with <= lowest wins, while
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with < highest one wins */
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if (delta <= deltaarray[idx-1]) {
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@ -472,7 +472,7 @@ static int __g450_setclk(struct matrox_fb_info *minfo, unsigned int fout,
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{
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unsigned long flags;
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unsigned int mnp;
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matroxfb_DAC_lock_irqsave(flags);
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mnp = g450_checkcache(minfo, ci, mnparray[0]);
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if (mnp != NO_MORE_MNP) {
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@ -495,7 +495,7 @@ int matroxfb_g450_setclk(struct matrox_fb_info *minfo, unsigned int fout,
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unsigned int pll)
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{
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unsigned int* arr;
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arr = kmalloc(sizeof(*arr) * MNP_TABLE_SIZE * 2, GFP_KERNEL);
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if (arr) {
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int r;
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@ -43,11 +43,11 @@ static void DAC1064_calcclock(const struct matrox_fb_info *minfo,
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unsigned int p;
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DBG(__func__)
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/* only for devices older than G450 */
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fvco = PLL_calcclock(minfo, freq, fmax, in, feed, &p);
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p = (1 << p) - 1;
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if (fvco <= 100000)
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;
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@ -169,7 +169,7 @@ static void g450_set_plls(struct matrox_fb_info *minfo)
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struct matrox_hw_state *hw = &minfo->hw;
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int pixelmnp;
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int videomnp;
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c2_ctl = hw->crtc2.ctl & ~0x4007; /* Clear PLL + enable for CRTC2 */
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c2_ctl |= 0x0001; /* Enable CRTC2 */
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hw->DACreg[POS1064_XPWRCTRL] &= ~0x02; /* Stop VIDEO PLL */
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@ -192,7 +192,7 @@ static void g450_set_plls(struct matrox_fb_info *minfo)
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}
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c2_ctl |= 0x0006; /* Use video PLL */
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hw->DACreg[POS1064_XPWRCTRL] |= 0x02;
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outDAC1064(minfo, M1064_XPWRCTRL, hw->DACreg[POS1064_XPWRCTRL]);
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matroxfb_g450_setpll_cond(minfo, videomnp, M_VIDEO_PLL);
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}
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@ -200,7 +200,7 @@ static void g450_set_plls(struct matrox_fb_info *minfo)
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hw->DACreg[POS1064_XPIXCLKCTRL] &= ~M1064_XPIXCLKCTRL_PLL_UP;
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if (pixelmnp >= 0) {
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hw->DACreg[POS1064_XPIXCLKCTRL] |= M1064_XPIXCLKCTRL_PLL_UP;
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outDAC1064(minfo, M1064_XPIXCLKCTRL, hw->DACreg[POS1064_XPIXCLKCTRL]);
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matroxfb_g450_setpll_cond(minfo, pixelmnp, M_PIXEL_PLL_C);
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}
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@ -303,9 +303,9 @@ void DAC1064_global_init(struct matrox_fb_info *minfo)
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poweroff TMDS. But if we boot with DFP connected,
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TMDS generated clocks are used instead of ALL pixclocks
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available... If someone knows which register
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handles it, please reveal this secret to me... */
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handles it, please reveal this secret to me... */
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hw->DACreg[POS1064_XPWRCTRL] &= ~0x04; /* Poweroff TMDS */
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#endif
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#endif
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break;
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}
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/* Now set timming related variables... */
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@ -728,14 +728,14 @@ static void g450_mclk_init(struct matrox_fb_info *minfo)
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} else {
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unsigned long flags;
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unsigned int pwr;
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matroxfb_DAC_lock_irqsave(flags);
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pwr = inDAC1064(minfo, M1064_XPWRCTRL) & ~0x02;
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outDAC1064(minfo, M1064_XPWRCTRL, pwr);
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matroxfb_DAC_unlock_irqrestore(flags);
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}
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matroxfb_g450_setclk(minfo, minfo->values.pll.system, M_SYSTEM_PLL);
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/* switch clocks to their real PLL source(s) */
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pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg | 4);
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pci_write_config_dword(minfo->pcidev, PCI_OPTION3_REG, minfo->values.reg.opt3);
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@ -748,15 +748,15 @@ static void g450_memory_init(struct matrox_fb_info *minfo)
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/* disable memory refresh */
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minfo->hw.MXoptionReg &= ~0x001F8000;
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pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg);
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/* set memory interface parameters */
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minfo->hw.MXoptionReg &= ~0x00207E00;
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minfo->hw.MXoptionReg |= 0x00207E00 & minfo->values.reg.opt;
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pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg);
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pci_write_config_dword(minfo->pcidev, PCI_OPTION2_REG, minfo->values.reg.opt2);
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mga_outl(M_CTLWTST, minfo->values.reg.mctlwtst);
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/* first set up memory interface with disabled memory interface clocks */
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pci_write_config_dword(minfo->pcidev, PCI_MEMMISC_REG, minfo->values.reg.memmisc & ~0x80000000U);
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mga_outl(M_MEMRDBK, minfo->values.reg.memrdbk);
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@ -765,25 +765,25 @@ static void g450_memory_init(struct matrox_fb_info *minfo)
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pci_write_config_dword(minfo->pcidev, PCI_MEMMISC_REG, minfo->values.reg.memmisc | 0x80000000U);
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udelay(200);
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if (minfo->values.memory.ddr && (!minfo->values.memory.emrswen || !minfo->values.memory.dll)) {
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mga_outl(M_MEMRDBK, minfo->values.reg.memrdbk & ~0x1000);
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}
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mga_outl(M_MACCESS, minfo->values.reg.maccess | 0x8000);
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udelay(200);
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minfo->hw.MXoptionReg |= 0x001F8000 & minfo->values.reg.opt;
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pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg);
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/* value is written to memory chips only if old != new */
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mga_outl(M_PLNWT, 0);
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mga_outl(M_PLNWT, ~0);
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if (minfo->values.reg.mctlwtst != minfo->values.reg.mctlwtst_core) {
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mga_outl(M_CTLWTST, minfo->values.reg.mctlwtst_core);
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}
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}
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static void g450_preinit(struct matrox_fb_info *minfo)
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@ -791,7 +791,7 @@ static void g450_preinit(struct matrox_fb_info *minfo)
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u_int32_t c2ctl;
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u_int8_t curctl;
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u_int8_t c1ctl;
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/* minfo->hw.MXoptionReg = minfo->values.reg.opt; */
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minfo->hw.MXoptionReg &= 0xC0000100;
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minfo->hw.MXoptionReg |= 0x00000020;
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@ -805,7 +805,7 @@ static void g450_preinit(struct matrox_fb_info *minfo)
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pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg);
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/* Init system clocks */
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/* stop crtc2 */
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c2ctl = mga_inl(M_C2CTL);
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mga_outl(M_C2CTL, c2ctl & ~1);
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@ -818,20 +818,20 @@ static void g450_preinit(struct matrox_fb_info *minfo)
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g450_mclk_init(minfo);
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g450_memory_init(minfo);
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/* set legacy VGA clock sources for DOSEmu or VMware... */
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matroxfb_g450_setclk(minfo, 25175, M_PIXEL_PLL_A);
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matroxfb_g450_setclk(minfo, 28322, M_PIXEL_PLL_B);
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/* restore crtc1 */
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mga_setr(M_SEQ_INDEX, 1, c1ctl);
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/* restore cursor */
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outDAC1064(minfo, M1064_XCURCTRL, curctl);
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/* restore crtc2 */
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mga_outl(M_C2CTL, c2ctl);
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return;
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}
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@ -32,29 +32,29 @@ struct mctl {
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#define WLMAX 0x3FF
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static const struct mctl g450_controls[] =
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{ { { V4L2_CID_BRIGHTNESS, V4L2_CTRL_TYPE_INTEGER,
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{ { { V4L2_CID_BRIGHTNESS, V4L2_CTRL_TYPE_INTEGER,
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"brightness",
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0, WLMAX-BLMIN, 1, 370-BLMIN,
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0, WLMAX-BLMIN, 1, 370-BLMIN,
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0,
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}, offsetof(struct matrox_fb_info, altout.tvo_params.brightness) },
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{ { V4L2_CID_CONTRAST, V4L2_CTRL_TYPE_INTEGER,
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{ { V4L2_CID_CONTRAST, V4L2_CTRL_TYPE_INTEGER,
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"contrast",
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0, 1023, 1, 127,
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0, 1023, 1, 127,
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0,
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}, offsetof(struct matrox_fb_info, altout.tvo_params.contrast) },
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{ { V4L2_CID_SATURATION, V4L2_CTRL_TYPE_INTEGER,
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"saturation",
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0, 255, 1, 165,
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0, 255, 1, 165,
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0,
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}, offsetof(struct matrox_fb_info, altout.tvo_params.saturation) },
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{ { V4L2_CID_HUE, V4L2_CTRL_TYPE_INTEGER,
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"hue",
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0, 255, 1, 0,
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0, 255, 1, 0,
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0,
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}, offsetof(struct matrox_fb_info, altout.tvo_params.hue) },
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{ { MATROXFB_CID_TESTOUT, V4L2_CTRL_TYPE_BOOLEAN,
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"test output",
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0, 1, 1, 0,
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0, 1, 1, 0,
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0,
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}, offsetof(struct matrox_fb_info, altout.tvo_params.testout) },
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};
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@ -89,7 +89,7 @@ static inline int *get_ctrl_ptr(struct matrox_fb_info *minfo, unsigned int idx)
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static void tvo_fill_defaults(struct matrox_fb_info *minfo)
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{
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unsigned int i;
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for (i = 0; i < G450CTRLS; i++) {
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*get_ctrl_ptr(minfo, i) = g450_controls[i].desc.default_value;
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}
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@ -99,7 +99,7 @@ static int cve2_get_reg(struct matrox_fb_info *minfo, int reg)
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{
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unsigned long flags;
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int val;
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matroxfb_DAC_lock_irqsave(flags);
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matroxfb_DAC_out(minfo, 0x87, reg);
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val = matroxfb_DAC_in(minfo, 0x88);
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@ -141,16 +141,16 @@ static void g450_compute_bwlevel(const struct matrox_fb_info *minfo, int *bl,
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static int g450_query_ctrl(void* md, struct v4l2_queryctrl *p) {
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int i;
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i = get_ctrl_id(p->id);
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if (i >= 0) {
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*p = g450_controls[i].desc;
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return 0;
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}
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if (i == -ENOENT) {
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static const struct v4l2_queryctrl disctrl =
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static const struct v4l2_queryctrl disctrl =
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{ .flags = V4L2_CTRL_FLAG_DISABLED };
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i = p->id;
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*p = disctrl;
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p->id = i;
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@ -163,7 +163,7 @@ static int g450_query_ctrl(void* md, struct v4l2_queryctrl *p) {
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static int g450_set_ctrl(void* md, struct v4l2_control *p) {
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int i;
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struct matrox_fb_info *minfo = md;
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i = get_ctrl_id(p->id);
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if (i < 0) return -EINVAL;
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@ -209,7 +209,7 @@ static int g450_set_ctrl(void* md, struct v4l2_control *p) {
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}
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break;
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}
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return 0;
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}
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@ -217,7 +217,7 @@ static int g450_set_ctrl(void* md, struct v4l2_control *p) {
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static int g450_get_ctrl(void* md, struct v4l2_control *p) {
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int i;
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struct matrox_fb_info *minfo = md;
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i = get_ctrl_id(p->id);
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if (i < 0) return -EINVAL;
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p->value = *get_ctrl_ptr(minfo, i);
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@ -247,22 +247,22 @@ static void computeRegs(struct matrox_fb_info *minfo, struct mavenregs *r,
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unsigned long long piic;
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int mnp;
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int over;
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r->regs[0x80] = 0x03; /* | 0x40 for SCART */
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hvis = ((mt->HDisplay << 1) + 3) & ~3;
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if (hvis >= 2048) {
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hvis = 2044;
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}
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piic = 1000000000ULL * hvis;
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do_div(piic, outd->h_vis);
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dprintk(KERN_DEBUG "Want %u kHz pixclock\n", (unsigned int)piic);
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mnp = matroxfb_g450_setclk(minfo, piic, M_VIDEO_PLL);
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mt->mnp = mnp;
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mt->pixclock = g450_mnp2f(minfo, mnp);
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@ -275,7 +275,7 @@ static void computeRegs(struct matrox_fb_info *minfo, struct mavenregs *r,
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piic = outd->chromasc;
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do_div(piic, mt->pixclock);
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chromasc = piic;
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dprintk(KERN_DEBUG "Chroma is %08X\n", chromasc);
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r->regs[0] = piic >> 24;
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@ -287,7 +287,7 @@ static void computeRegs(struct matrox_fb_info *minfo, struct mavenregs *r,
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hsl = (((outd->h_sync + pixclock) / pixclock)) & ~1;
|
||||
hlen = hvis + hfp + hsl + hbp;
|
||||
over = hlen & 0x0F;
|
||||
|
||||
|
||||
dprintk(KERN_DEBUG "WL: vis=%u, hf=%u, hs=%u, hb=%u, total=%u\n", hvis, hfp, hsl, hbp, hlen);
|
||||
|
||||
if (over) {
|
||||
|
|
@ -310,14 +310,14 @@ static void computeRegs(struct matrox_fb_info *minfo, struct mavenregs *r,
|
|||
r->regs[0x2C] = hfp;
|
||||
r->regs[0x31] = hvis / 8;
|
||||
r->regs[0x32] = hvis & 7;
|
||||
|
||||
|
||||
dprintk(KERN_DEBUG "PG: vis=%04X, hf=%02X, hs=%02X, hb=%02X, total=%04X\n", hvis, hfp, hsl, hbp, hlen);
|
||||
|
||||
r->regs[0x84] = 1; /* x sync point */
|
||||
r->regs[0x85] = 0;
|
||||
hvis = hvis >> 1;
|
||||
hlen = hlen >> 1;
|
||||
|
||||
|
||||
dprintk(KERN_DEBUG "hlen=%u hvis=%u\n", hlen, hvis);
|
||||
|
||||
mt->interlaced = 1;
|
||||
|
|
@ -332,13 +332,13 @@ static void computeRegs(struct matrox_fb_info *minfo, struct mavenregs *r,
|
|||
unsigned int vtotal;
|
||||
unsigned int vsyncend;
|
||||
unsigned int vdisplay;
|
||||
|
||||
|
||||
vtotal = mt->VTotal;
|
||||
vsyncend = mt->VSyncEnd;
|
||||
vdisplay = mt->VDisplay;
|
||||
if (vtotal < outd->v_total) {
|
||||
unsigned int yovr = outd->v_total - vtotal;
|
||||
|
||||
|
||||
vsyncend += yovr >> 1;
|
||||
} else if (vtotal > outd->v_total) {
|
||||
vdisplay = outd->v_total - 4;
|
||||
|
|
@ -350,7 +350,7 @@ static void computeRegs(struct matrox_fb_info *minfo, struct mavenregs *r,
|
|||
r->regs[0x33] = upper - 1; /* upper blanking */
|
||||
r->regs[0x82] = upper; /* y sync point */
|
||||
r->regs[0x83] = upper >> 8;
|
||||
|
||||
|
||||
mt->VDisplay = vdisplay;
|
||||
mt->VSyncStart = outd->v_total - 2;
|
||||
mt->VSyncEnd = outd->v_total;
|
||||
|
|
@ -509,9 +509,9 @@ static void cve2_init_TV(struct matrox_fb_info *minfo,
|
|||
LR(0x80);
|
||||
LR(0x82); LR(0x83);
|
||||
LR(0x84); LR(0x85);
|
||||
|
||||
|
||||
cve2_set_reg(minfo, 0x3E, 0x01);
|
||||
|
||||
|
||||
for (i = 0; i < 0x3E; i++) {
|
||||
LR(i);
|
||||
}
|
||||
|
|
@ -558,7 +558,7 @@ static int matroxfb_g450_compute(void* md, struct my_timming* mt) {
|
|||
|
||||
static int matroxfb_g450_program(void* md) {
|
||||
struct matrox_fb_info *minfo = md;
|
||||
|
||||
|
||||
if (minfo->outputs[1].mode != MATROXFB_OUTPUT_MODE_MONITOR) {
|
||||
cve2_init_TV(minfo, &minfo->hw.maven);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -390,7 +390,7 @@ void matroxfb_vgaHWrestore(struct matrox_fb_info *minfo)
|
|||
|
||||
static void get_pins(unsigned char __iomem* pins, struct matrox_bios* bd) {
|
||||
unsigned int b0 = readb(pins);
|
||||
|
||||
|
||||
if (b0 == 0x2E && readb(pins+1) == 0x41) {
|
||||
unsigned int pins_len = readb(pins+2);
|
||||
unsigned int i;
|
||||
|
|
@ -426,7 +426,7 @@ static void get_pins(unsigned char __iomem* pins, struct matrox_bios* bd) {
|
|||
|
||||
static void get_bios_version(unsigned char __iomem * vbios, struct matrox_bios* bd) {
|
||||
unsigned int pcir_offset;
|
||||
|
||||
|
||||
pcir_offset = readb(vbios + 24) | (readb(vbios + 25) << 8);
|
||||
if (pcir_offset >= 26 && pcir_offset < 0xFFE0 &&
|
||||
readb(vbios + pcir_offset ) == 'P' &&
|
||||
|
|
@ -451,7 +451,7 @@ static void get_bios_version(unsigned char __iomem * vbios, struct matrox_bios*
|
|||
|
||||
static void get_bios_output(unsigned char __iomem* vbios, struct matrox_bios* bd) {
|
||||
unsigned char b;
|
||||
|
||||
|
||||
b = readb(vbios + 0x7FF1);
|
||||
if (b == 0xFF) {
|
||||
b = 0;
|
||||
|
|
@ -461,7 +461,7 @@ static void get_bios_output(unsigned char __iomem* vbios, struct matrox_bios* bd
|
|||
|
||||
static void get_bios_tvout(unsigned char __iomem* vbios, struct matrox_bios* bd) {
|
||||
unsigned int i;
|
||||
|
||||
|
||||
/* Check for 'IBM .*(V....TVO' string - it means TVO BIOS */
|
||||
bd->output.tvout = 0;
|
||||
if (readb(vbios + 0x1D) != 'I' ||
|
||||
|
|
@ -472,7 +472,7 @@ static void get_bios_tvout(unsigned char __iomem* vbios, struct matrox_bios* bd)
|
|||
}
|
||||
for (i = 0x2D; i < 0x2D + 128; i++) {
|
||||
unsigned char b = readb(vbios + i);
|
||||
|
||||
|
||||
if (b == '(' && readb(vbios + i + 1) == 'V') {
|
||||
if (readb(vbios + i + 6) == 'T' &&
|
||||
readb(vbios + i + 7) == 'V' &&
|
||||
|
|
@ -488,7 +488,7 @@ static void get_bios_tvout(unsigned char __iomem* vbios, struct matrox_bios* bd)
|
|||
|
||||
static void parse_bios(unsigned char __iomem* vbios, struct matrox_bios* bd) {
|
||||
unsigned int pins_offset;
|
||||
|
||||
|
||||
if (readb(vbios) != 0x55 || readb(vbios + 1) != 0xAA) {
|
||||
return;
|
||||
}
|
||||
|
|
@ -648,9 +648,9 @@ static int parse_pins5(struct matrox_fb_info *minfo,
|
|||
const struct matrox_bios *bd)
|
||||
{
|
||||
unsigned int mult;
|
||||
|
||||
|
||||
mult = bd->pins[4]?8000:6000;
|
||||
|
||||
|
||||
minfo->limits.pixel.vcomax = (bd->pins[ 38] == 0xFF) ? 600000 : bd->pins[ 38] * mult;
|
||||
minfo->limits.system.vcomax = (bd->pins[ 36] == 0xFF) ? minfo->limits.pixel.vcomax : bd->pins[ 36] * mult;
|
||||
minfo->limits.video.vcomax = (bd->pins[ 37] == 0xFF) ? minfo->limits.system.vcomax : bd->pins[ 37] * mult;
|
||||
|
|
@ -770,7 +770,7 @@ void matroxfb_read_pins(struct matrox_fb_info *minfo)
|
|||
u32 biosbase;
|
||||
u32 fbbase;
|
||||
struct pci_dev *pdev = minfo->pcidev;
|
||||
|
||||
|
||||
memset(&minfo->bios, 0, sizeof(minfo->bios));
|
||||
pci_read_config_dword(pdev, PCI_OPTION_REG, &opt);
|
||||
pci_write_config_dword(pdev, PCI_OPTION_REG, opt | PCI_OPTION_ENABLE_ROM);
|
||||
|
|
@ -790,7 +790,7 @@ void matroxfb_read_pins(struct matrox_fb_info *minfo)
|
|||
} else {
|
||||
unsigned int ven = readb(b+0x64+0) | (readb(b+0x64+1) << 8);
|
||||
unsigned int dev = readb(b+0x64+2) | (readb(b+0x64+3) << 8);
|
||||
|
||||
|
||||
if (ven != pdev->vendor || dev != pdev->device) {
|
||||
printk(KERN_INFO "matroxfb: Legacy BIOS is for %04X:%04X, while this device is %04X:%04X\n",
|
||||
ven, dev, pdev->vendor, pdev->device);
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue