drm/amdgpu: enable xgmi support for sienna cichlid

set xgmi support flag suring nv ip init sequence

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
John Clements 2020-07-17 14:13:50 +08:00 committed by Alex Deucher
parent cff5f79019
commit c652923afa

View file

@ -446,6 +446,9 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
adev->nbio.funcs = &nbio_v2_3_funcs;
adev->nbio.hdp_flush_reg = &nbio_v2_3_hdp_flush_reg;
if (adev->asic_type == CHIP_SIENNA_CICHLID)
adev->gmc.xgmi.supported = true;
/* Set IP register base before any HW register access */
r = nv_reg_base_init(adev);
if (r)