mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-09-18 22:14:16 +00:00
TI K3 device tree updates for v6.17
Generic fixes and cleanups: * Enable overlays for all DTB files * Enable Schmitt Trigger by default in K3 pinctrl SoC specific changes: AM62D * Add new SoC support and pinctrl entries AM62 * Remove eMMC High Speed DDR support * Move eMMC pinmux to top level board file J784S4/J742S2 * Add Power on BIST (PBSIT) nodes * Add ACSPCIE1 node J721S2 * Add McASP support J722S * Add alernate audio-refclk0 node Board changes: Multiple boards * Bootphase tags for Ethernet boot support AM62D2-EVM * Add new board support AM62A7-SK * Fix pinmux for main_uart1 * Add SPI NAND support AM62P * Fix PWM_3_DSI GPIO direction, SD pull up, I2C ups on AM62P-Verdin * Add bootph-all property for Ethernet boot AM62-Verdin * Enable pull-ups on I2C buses AM654-base-board * Add boot phase tags for various bootmodes AM64 * Add boot phase tag PCIe EP boot * Fix PRU-ICSSG Ethernet ports on AM642-PhyBoard-Electra AM69-SK * Add idle-states for remaining SERDES instances J722S-EVM * Fix USB gpio-hog level for Type-C -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEEyRC2zAhGcGjrhiNExEYeRXyRFuMFAmh18A0QHHZpZ25lc2hy QHRpLmNvbQAKCRDERh5FfJEW43WXB/9n9R5iu91d1eCwPtTLdKtuzMNSJA82IJYx Xy/4vKbj2w15Vzc3/1HQR2ht3GZAnXmg+5ybRUPRHkMLD1uPhVJkRByD91DEiN4E GdBz1167S9TJUjZym84gZUDwfyItfYoPd02DO+ZUOqMIQ5PwK5u3Id8t1mtluQOM ZrgaJOKIqwROobvzOsa5J66bu+yyaSxxS5A8ohcM7gKWmvXaq++A4Km6mFUMJ/WU Lt2zpP0j3nAXZ56lh0fFZSi86e7d+5w+lbLCKpxwQxdYFRcEhlL1vsY9kRZ0afUi 6dAD51UiUtov/04/sx4G53w6Hzk0geNSKDLJFYT2NGjdJSx0h4i2 =RjfZ -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh/7BMACgkQmmx57+YA GNnZfRAAqmjtP0qY2/glEiN+385vel86hV/nvwI+JocatSyxzNUMaLWhCdciFNF8 +i70iGRQTmZGLTuRd8dkVZFDNgA85urzZ2RjFH6n7FsbQ19rTXQWSgXRiZukVhYT OBnbsGJit2iCarwMBwYllML1J3dcmSx0KDf1PLedfP3Qlp1dBY/Xw7LLvJBqBCFs +zV33exbw9Zzo6ifiKRpGdE5SFHLENakmmXlyQTwE2madLwPY6GfsejjMwWWM3rV AkqUbnwfGeANNZ2AS1wO/gK98LfyQ1oRmymfAgvm/Mm+KVrBFTsl0tm22JZwUf6U s0dSRMYQzK4pXLz0TkfwdIUAJG9xZC7A9C5hBNQWyeV7v7392MRD5n8eM/bMmdt/ lKHQ7AYQ5C9Fdaw6/0UEq7VmFDOa2pVenmu2sGnjhL0QDB4Fz23ysQJeXRZ9yT5o /Vs5BoeRZ1AGWye+mfstNyVFn5T95RKvu0A5deJ1HPhnKSxsXwQNq+IbLovBdeZU wNavUyOaswBy6EUVmArlscUF1LZ7R8FD8Qbk5VFMcgiwOZ69f8CglJvDTigjhLfi x+bEBLlhJ2x4g1bPaMzAZsna/QJ1VDaUC3PPaotYmUfGbcC2oPaNjCxIWL9binM/ +RP3lP3APRSku05pyilTH7M0qt6QuJ5Fkv3LO6xGLl8nsBaSW5U= =OALb -----END PGP SIGNATURE----- Merge tag 'ti-k3-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt TI K3 device tree updates for v6.17 Generic fixes and cleanups: * Enable overlays for all DTB files * Enable Schmitt Trigger by default in K3 pinctrl SoC specific changes: AM62D * Add new SoC support and pinctrl entries AM62 * Remove eMMC High Speed DDR support * Move eMMC pinmux to top level board file J784S4/J742S2 * Add Power on BIST (PBSIT) nodes * Add ACSPCIE1 node J721S2 * Add McASP support J722S * Add alernate audio-refclk0 node Board changes: Multiple boards * Bootphase tags for Ethernet boot support AM62D2-EVM * Add new board support AM62A7-SK * Fix pinmux for main_uart1 * Add SPI NAND support AM62P * Fix PWM_3_DSI GPIO direction, SD pull up, I2C ups on AM62P-Verdin * Add bootph-all property for Ethernet boot AM62-Verdin * Enable pull-ups on I2C buses AM654-base-board * Add boot phase tags for various bootmodes AM64 * Add boot phase tag PCIe EP boot * Fix PRU-ICSSG Ethernet ports on AM642-PhyBoard-Electra AM69-SK * Add idle-states for remaining SERDES instances J722S-EVM * Fix USB gpio-hog level for Type-C * tag 'ti-k3-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (33 commits) arm64: dts: ti: k3-am69-sk: Add idle-states for remaining SERDES instances arm64: dts: ti: k3-am62a7-sk: add boot phase tags arm64: dts: ti: k3-am654-base-board: add boot phase tags arm64: dts: ti: k3-am65: add boot phase tags arm64: dts: ti: k3-am69-sk: Add bootph-all property to enable Ethernet boot arm64: dts: ti: k3-j722s-evm: Add bootph-all property to enable Ethernet boot arm64: dts: ti: k3-am62p5-sk: Add bootph-all property to enable Ethernet boot arm64: dts: ti: k3-am68-sk-base-board: Add bootph-all property to enable Ethernet boot arm64: dts: ti: Add support for AM62D2-EVM arm64: dts: ti: Add pinctrl entries for AM62D2 family of SoCs dt-bindings: arm: ti: Add AM62D2 SoC and Boards arm64: dts: ti: Add bootph property to nodes at source for am62a arm64: dts: ti: k3-am62p-verdin: Adjust temperature trip points arm64: dts: ti: k3-am62p-j722s: Enable freq throttling on thermal alert arm64: dts: ti: k3-j784s4-j742s2-main-common: Add PBIST_14 node dt-bindings: soc: ti: bist: Add BIST for K3 devices arm64: dts: ti: k3-am62-main: Remove eMMC High Speed DDR support arm64: dts: ti: k3-am62*: Move eMMC pinmux to top level board file arm64: dts: ti: k3-am62a7-sk: fix pinmux for main_uart1 arm64: dts: ti: Enable overlays for all DTB files ... Link: https://lore.kernel.org/r/a0401460-8c67-4c29-a6cf-fa4bdf33bc7d@ti.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
c522d00e1b
33 changed files with 1138 additions and 65 deletions
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@ -25,6 +25,12 @@ properties:
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- ti,am62a7-sk
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- const: ti,am62a7
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- description: K3 AM62D2 SoC and Boards
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items:
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- enum:
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- ti,am62d2-evm
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- const: ti,am62d2
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- description: K3 AM62A7 SoC PHYTEC phyBOARD-Lyra
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items:
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- const: phytec,am62a7-phyboard-lyra-rdk
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63
Documentation/devicetree/bindings/soc/ti/ti,j784s4-bist.yaml
Normal file
63
Documentation/devicetree/bindings/soc/ti/ti,j784s4-bist.yaml
Normal file
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@ -0,0 +1,63 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (C) 2025 Texas Instruments Incorporated
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/ti/ti,j784s4-bist.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Texas Instruments K3 BIST
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maintainers:
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- Neha Malcom Francis <n-francis@ti.com>
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allOf:
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- $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
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description:
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The BIST (Built-In Self Test) module is an IP block present in K3 devices
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that support triggering of BIST tests, both PBIST (Memory BIST) and LBIST
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(Logic BIST) on a core. Both tests are destructive in nature. At boot, BIST
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is executed by hardware for the MCU domain automatically as part of HW POST.
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properties:
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compatible:
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const: ti,j784s4-bist
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reg:
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maxItems: 2
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reg-names:
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items:
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- const: cfg
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- const: ctrl_mmr
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clocks:
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maxItems: 1
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power-domains:
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maxItems: 1
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required:
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- compatible
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- reg
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- reg-names
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- ti,sci-dev-id
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/soc/ti,sci_pm_domain.h>
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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safety-selftest@33c0000 {
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compatible = "ti,j784s4-bist";
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reg = <0x00 0x033c0000 0x00 0x400>,
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<0x00 0x0010c1a0 0x00 0x01c>;
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reg-names = "cfg", "ctrl_mmr";
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clocks = <&k3_clks 237 7>;
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power-domains = <&k3_pds 237 TI_SCI_PD_EXCLUSIVE>;
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ti,sci-dev-id = <234>;
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};
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};
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@ -33,6 +33,9 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62-pocketbeagle2.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62a7-phyboard-lyra-rdk.dtb
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# Boards with AM62Dx SoC
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dtb-$(CONFIG_ARCH_K3) += k3-am62d2-evm.dtb
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# Boards with AM62Px SoC
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-sk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-dahlia.dtb
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@ -278,24 +281,4 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
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k3-j784s4-evm-usxgmii-exp1-exp2.dtb
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# Enable support for device-tree overlays
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DTC_FLAGS_k3-am625-beagleplay += -@
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DTC_FLAGS_k3-am625-phyboard-lyra-rdk += -@
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DTC_FLAGS_k3-am62a7-phyboard-lyra-rdk += -@
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DTC_FLAGS_k3-am625-sk += -@
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DTC_FLAGS_k3-am62-lp-sk += -@
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DTC_FLAGS_k3-am62a7-sk += -@
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DTC_FLAGS_k3-am62p5-sk += -@
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DTC_FLAGS_k3-am642-evm += -@
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DTC_FLAGS_k3-am642-phyboard-electra-rdk += -@
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DTC_FLAGS_k3-am642-tqma64xxl-mbax4xxl += -@
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DTC_FLAGS_k3-am6548-iot2050-advanced-m2 += -@
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DTC_FLAGS_k3-am68-sk-base-board += -@
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DTC_FLAGS_k3-am69-sk += -@
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DTC_FLAGS_k3-j7200-common-proc-board += -@
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DTC_FLAGS_k3-j721e-common-proc-board += -@
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DTC_FLAGS_k3-j721e-evm-pcie0-ep += -@
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DTC_FLAGS_k3-j721e-sk += -@
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DTC_FLAGS_k3-j721s2-common-proc-board += -@
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DTC_FLAGS_k3-j722s-evm += -@
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DTC_FLAGS_k3-j784s4-evm += -@
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DTC_FLAGS_k3-j742s2-evm += -@
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DTC_FLAGS := -@
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@ -74,6 +74,22 @@
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};
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&main_pmx0 {
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main_mmc0_pins_default: main-mmc0-default-pins {
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bootph-all;
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pinctrl-single,pins = <
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AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (V3) MMC0_CMD */
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AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (Y1) MMC0_CLK */
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AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (V2) MMC0_DAT0 */
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AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (V1) MMC0_DAT1 */
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AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (W2) MMC0_DAT2 */
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AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (W1) MMC0_DAT3 */
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AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (Y2) MMC0_DAT4 */
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AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (W3) MMC0_DAT5 */
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AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (W4) MMC0_DAT6 */
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AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (V4) MMC0_DAT7 */
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>;
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};
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vddshv_sdio_pins_default: vddshv-sdio-default-pins {
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pinctrl-single,pins = <
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AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO0_31 */
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@ -144,6 +160,14 @@
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};
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};
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&sdhci0 {
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bootph-all;
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non-removable;
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pinctrl-names = "default";
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pinctrl-0 = <&main_mmc0_pins_default>;
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status = "okay";
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};
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&sdhci1 {
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vmmc-supply = <&vdd_mmc1>;
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vqmmc-supply = <&vddshv_sdio>;
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@ -553,7 +553,6 @@
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clocks = <&k3_clks 57 5>, <&k3_clks 57 6>;
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clock-names = "clk_ahb", "clk_xin";
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bus-width = <8>;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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ti,clkbuf-sel = <0x7>;
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ti,otap-del-sel-legacy = <0x0>;
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@ -507,16 +507,16 @@
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/* Verdin I2C_2_DSI */
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pinctrl_i2c2: main-i2c2-default-pins {
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pinctrl-single,pins = <
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AM62X_IOPAD(0x00b0, PIN_INPUT, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */ /* SODIMM 55 */
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AM62X_IOPAD(0x00b4, PIN_INPUT, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */ /* SODIMM 53 */
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AM62X_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */ /* SODIMM 55 */
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AM62X_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */ /* SODIMM 53 */
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>;
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};
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/* Verdin I2C_4_CSI */
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pinctrl_i2c3: main-i2c3-default-pins {
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pinctrl-single,pins = <
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AM62X_IOPAD(0x01d0, PIN_INPUT, 2) /* (A15) UART0_CTSn.I2C3_SCL */ /* SODIMM 95 */
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AM62X_IOPAD(0x01d4, PIN_INPUT, 2) /* (B15) UART0_RTSn.I2C3_SDA */ /* SODIMM 93 */
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AM62X_IOPAD(0x01d0, PIN_INPUT_PULLUP, 2) /* (A15) UART0_CTSn.I2C3_SCL */ /* SODIMM 95 */
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AM62X_IOPAD(0x01d4, PIN_INPUT_PULLUP, 2) /* (B15) UART0_RTSn.I2C3_SDA */ /* SODIMM 93 */
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>;
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};
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@ -786,8 +786,8 @@
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/* Verdin I2C_3_HDMI */
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pinctrl_mcu_i2c0: mcu-i2c0-default-pins {
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pinctrl-single,pins = <
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AM62X_MCU_IOPAD(0x0044, PIN_INPUT, 0) /* (A8) MCU_I2C0_SCL */ /* SODIMM 59 */
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AM62X_MCU_IOPAD(0x0048, PIN_INPUT, 0) /* (D10) MCU_I2C0_SDA */ /* SODIMM 57 */
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AM62X_MCU_IOPAD(0x0044, PIN_INPUT_PULLUP, 0) /* (A8) MCU_I2C0_SCL */ /* SODIMM 59 */
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AM62X_MCU_IOPAD(0x0048, PIN_INPUT_PULLUP, 0) /* (D10) MCU_I2C0_SDA */ /* SODIMM 57 */
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>;
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};
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@ -106,6 +106,22 @@
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};
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&main_pmx0 {
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main_mmc0_pins_default: main-mmc0-default-pins {
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bootph-all;
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pinctrl-single,pins = <
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AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
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AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
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AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
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AM62X_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */
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AM62X_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */
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AM62X_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */
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AM62X_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */
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AM62X_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */
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AM62X_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */
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AM62X_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */
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>;
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};
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main_rgmii2_pins_default: main-rgmii2-default-pins {
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bootph-all;
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pinctrl-single,pins = <
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@ -195,6 +211,14 @@
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};
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};
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&sdhci0 {
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bootph-all;
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non-removable;
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pinctrl-names = "default";
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pinctrl-0 = <&main_mmc0_pins_default>;
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status = "okay";
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};
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&sdhci1 {
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vmmc-supply = <&vdd_mmc1>;
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vqmmc-supply = <&vdd_sd_dv>;
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@ -51,6 +51,7 @@
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compatible = "ti,am654-phy-gmii-sel";
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reg = <0x4044 0x8>;
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#phy-cells = <1>;
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bootph-all;
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};
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epwm_tbclk: clock-controller@4130 {
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@ -96,6 +97,7 @@
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#mbox-cells = <1>;
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interrupt-names = "rx_012";
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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bootph-all;
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};
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inta_main_dmss: interrupt-controller@48000000 {
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@ -131,6 +133,7 @@
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ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
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ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
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ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
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bootph-all;
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};
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main_pktdma: dma-controller@485c0000 {
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|
@ -147,6 +150,8 @@
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"ring", "tchan", "rchan", "rflow";
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msi-parent = <&inta_main_dmss>;
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#dma-cells = <2>;
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||||
bootph-all;
|
||||
|
||||
ti,sci = <&dmsc>;
|
||||
ti,sci-dev-id = <30>;
|
||||
ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
|
||||
|
|
@ -220,16 +225,19 @@
|
|||
k3_pds: power-controller {
|
||||
compatible = "ti,sci-pm-domain";
|
||||
#power-domain-cells = <2>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
k3_clks: clock-controller {
|
||||
compatible = "ti,k2g-sci-clk";
|
||||
#clock-cells = <2>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
k3_reset: reset-controller {
|
||||
compatible = "ti,sci-reset";
|
||||
#reset-cells = <2>;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -254,6 +262,7 @@
|
|||
* firmware on non-MPU processors
|
||||
*/
|
||||
status = "disabled";
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_pmx0: pinctrl@f4000 {
|
||||
|
|
@ -282,6 +291,7 @@
|
|||
assigned-clock-parents = <&k3_clks 36 3>;
|
||||
power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
|
||||
ti,timer-pwm;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_timer1: timer@2410000 {
|
||||
|
|
@ -651,6 +661,7 @@
|
|||
interrupt-names = "host", "peripheral";
|
||||
maximum-speed = "high-speed";
|
||||
dr_mode = "otg";
|
||||
bootph-all;
|
||||
snps,usb2-gadget-lpm-disable;
|
||||
snps,usb2-lpm-disable;
|
||||
};
|
||||
|
|
@ -745,6 +756,7 @@
|
|||
phys = <&phy_gmii_sel 1>;
|
||||
mac-address = [00 00 00 00 00 00];
|
||||
ti,syscon-efuse = <&cpsw_mac_syscon 0x0>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
cpsw_port2: port@2 {
|
||||
|
|
@ -764,6 +776,7 @@
|
|||
clocks = <&k3_clks 13 0>;
|
||||
clock-names = "fck";
|
||||
bus_freq = <1000000>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
cpts@3d000 {
|
||||
|
|
|
|||
|
|
@ -17,6 +17,7 @@
|
|||
chipid: chipid@14 {
|
||||
compatible = "ti,am654-chipid";
|
||||
reg = <0x14 0x4>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
opp_efuse_table: syscon@18 {
|
||||
|
|
@ -67,6 +68,7 @@
|
|||
reg = <0 0x100>;
|
||||
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
bootph-pre-ram;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -36,6 +36,7 @@
|
|||
/* 4G RAM */
|
||||
reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
|
||||
<0x00000008 0x80000000 0x00000000 0x80000000>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
|
|
@ -151,6 +152,7 @@
|
|||
regulator-boot-on;
|
||||
enable-active-high;
|
||||
gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
vcc_3v3_sys: regulator-4 {
|
||||
|
|
@ -297,12 +299,13 @@
|
|||
AM62AX_IOPAD(0x1c8, PIN_INPUT, 0) /* (E14) UART0_RXD */
|
||||
AM62AX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_uart1_pins_default: main-uart1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_IOPAD(0x01e8, PIN_INPUT, 1) /* (C17) I2C1_SCL.UART1_RXD */
|
||||
AM62AX_IOPAD(0x01ec, PIN_OUTPUT, 1) /* (E17) I2C1_SDA.UART1_TXD */
|
||||
AM62AX_IOPAD(0x01ac, PIN_INPUT, 2) /* (B21) MCASP0_AFSR.UART1_RXD */
|
||||
AM62AX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (A21) MCASP0_ACLKR.UART1_TXD */
|
||||
AM62AX_IOPAD(0x0194, PIN_INPUT, 2) /* (C19) MCASP0_AXR3.UART1_CTSn */
|
||||
AM62AX_IOPAD(0x0198, PIN_OUTPUT, 2) /* (B19) MCASP0_AXR2.UART1_RTSn */
|
||||
>;
|
||||
|
|
@ -320,6 +323,7 @@
|
|||
AM62AX_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
|
||||
AM62AX_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_i2c2_pins_default: main-i2c2-default-pins {
|
||||
|
|
@ -356,6 +360,7 @@
|
|||
AM62AX_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */
|
||||
AM62AX_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
usr_led_pins_default: usr-led-default-pins {
|
||||
|
|
@ -375,6 +380,7 @@
|
|||
AM62AX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */
|
||||
AM62AX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_rgmii1_pins_default: main-rgmii1-default-pins {
|
||||
|
|
@ -392,6 +398,7 @@
|
|||
AM62AX_IOPAD(0x130, PIN_INPUT, 0) /* (AB17) RGMII1_TXC */
|
||||
AM62AX_IOPAD(0x12c, PIN_INPUT, 0) /* (W16) RGMII1_TX_CTL */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_mcasp1_pins_default: main-mcasp1-default-pins {
|
||||
|
|
@ -572,6 +579,7 @@
|
|||
#interrupt-cells = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
|
||||
bootph-all;
|
||||
|
||||
gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
|
||||
"BT_EN_SOC", "MMC1_SD_EN",
|
||||
|
|
@ -675,10 +683,12 @@
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc1_pins_default>;
|
||||
disable-wp;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
status = "okay";
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_gpio1 {
|
||||
|
|
@ -693,6 +703,7 @@
|
|||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_uart0_pins_default>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
/* Main UART1 is used for TIFS firmware logs */
|
||||
|
|
@ -739,10 +750,15 @@
|
|||
pinctrl-0 = <&main_rgmii1_pins_default>;
|
||||
};
|
||||
|
||||
&phy_gmii_sel {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&cpsw_port1 {
|
||||
status = "okay";
|
||||
phy-mode = "rgmii-rxid";
|
||||
phy-handle = <&cpsw3g_phy0>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&cpsw_port2 {
|
||||
|
|
@ -759,6 +775,7 @@
|
|||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
ti,min-output-impedance;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -876,3 +893,45 @@
|
|||
&main_rti4 {
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&fss {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ospi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ospi0_pins_default>;
|
||||
|
||||
flash@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-tx-bus-width = <8>;
|
||||
spi-rx-bus-width = <8>;
|
||||
spi-max-frequency = <25000000>;
|
||||
cdns,tshsl-ns = <60>;
|
||||
cdns,tsd2d-ns = <60>;
|
||||
cdns,tchsh-ns = <60>;
|
||||
cdns,tslch-ns = <60>;
|
||||
cdns,read-delay = <2>;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
ospi0_pins_default: ospi0-default-pins {
|
||||
bootph-all;
|
||||
pinctrl-single,pins = <
|
||||
AM62AX_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
|
||||
AM62AX_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
|
||||
AM62AX_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */
|
||||
AM62AX_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */
|
||||
AM62AX_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */
|
||||
AM62AX_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */
|
||||
AM62AX_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */
|
||||
AM62AX_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */
|
||||
AM62AX_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */
|
||||
AM62AX_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */
|
||||
AM62AX_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
615
arch/arm64/boot/dts/ti/k3-am62d2-evm.dts
Normal file
615
arch/arm64/boot/dts/ti/k3-am62d2-evm.dts
Normal file
|
|
@ -0,0 +1,615 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only OR MIT
|
||||
/*
|
||||
* AM62D2 EVM: https://www.ti.com/lit/zip/sprcal5
|
||||
*
|
||||
* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/net/ti-dp83867.h>
|
||||
#include "k3-am62d2.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "ti,am62d2-evm", "ti,am62d2";
|
||||
model = "Texas Instruments AM62D2 EVM";
|
||||
|
||||
aliases {
|
||||
serial0 = &wkup_uart0;
|
||||
serial1 = &mcu_uart0;
|
||||
serial2 = &main_uart0;
|
||||
mmc0 = &sdhci0;
|
||||
mmc1 = &sdhci1;
|
||||
rtc0 = &wkup_rtc0;
|
||||
ethernet0 = &cpsw_port1;
|
||||
ethernet1 = &cpsw_port2;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &main_uart0;
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
/* 4G RAM */
|
||||
reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
|
||||
<0x00000008 0x80000000 0x00000000 0x80000000>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
/* global cma region */
|
||||
linux,cma {
|
||||
compatible = "shared-dma-pool";
|
||||
reusable;
|
||||
size = <0x00 0x2000000>;
|
||||
alloc-ranges = <0x00 0xc0000000 0x00 0x2000000>;
|
||||
linux,cma-default;
|
||||
};
|
||||
|
||||
secure_tfa_ddr: tfa@80000000 {
|
||||
reg = <0x00 0x80000000 0x00 0x80000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
c7x_0_dma_memory_region: c7x-dma-memory@99800000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x99800000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
c7x_0_memory_region: c7x-memory@99900000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x99900000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9b800000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9b900000 0x00 0xf00000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9c800000 0x00 0x100000>;
|
||||
no-map;
|
||||
};
|
||||
|
||||
wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0x9c900000 0x00 0xf00000>;
|
||||
no-map;
|
||||
bootph-pre-ram;
|
||||
};
|
||||
|
||||
secure_ddr: optee@9e800000 {
|
||||
reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
|
||||
no-map;
|
||||
};
|
||||
|
||||
rtos_ipc_memory_region: ipc-memories@a0000000 {
|
||||
compatible = "shared-dma-pool";
|
||||
reg = <0x00 0xa0000000 0x00 0x01000000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
opp-table {
|
||||
/* Requires VDD_CORE at 0v85 */
|
||||
opp-1400000000 {
|
||||
opp-hz = /bits/ 64 <1400000000>;
|
||||
opp-supported-hw = <0x01 0x0004>;
|
||||
clock-latency-ns = <6000000>;
|
||||
};
|
||||
};
|
||||
|
||||
vout_pd: regulator-0 {
|
||||
/* TPS65988 PD CONTROLLER OUTPUT */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vout_pd";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
vmain_pd: regulator-1 {
|
||||
/* Output of TPS22811 */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmain_pd";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&vout_pd>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
vcc_5v0: regulator-2 {
|
||||
/* Output of TPS630702RNMR */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_5v0";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&vmain_pd>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
vcc_3v3_main: regulator-3 {
|
||||
/* output of LM5141-Q1 */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3_main";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vmain_pd>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
vdd_mmc1: regulator-4 {
|
||||
/* TPS22918DBVR */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_mmc1";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
enable-active-high;
|
||||
gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
vcc_3v3_sys: regulator-5 {
|
||||
/* output of TPS222965DSGT */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3_sys";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vcc_3v3_main>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
vddshv_sdio: regulator-6 {
|
||||
compatible = "regulator-gpio";
|
||||
regulator-name = "vddshv_sdio";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vddshv_sdio_pins_default>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
gpios = <&main_gpio1 31 GPIO_ACTIVE_HIGH>;
|
||||
states = <1800000 0x0>,
|
||||
<3300000 0x1>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usr_led_pins_default>;
|
||||
|
||||
led-0 {
|
||||
label = "am62d-evm:green:heartbeat";
|
||||
gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
function = LED_FUNCTION_HEARTBEAT;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mcu_pmx0 {
|
||||
status = "okay";
|
||||
|
||||
pmic_irq_pins_default: pmic-irq-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62DX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */
|
||||
>;
|
||||
};
|
||||
|
||||
wkup_uart0_pins_default: wkup-uart0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62DX_MCU_IOPAD(0x0024, PIN_INPUT, 0) /* (C9) WKUP_UART0_RXD */
|
||||
AM62DX_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (E9) WKUP_UART0_TXD */
|
||||
AM62DX_MCU_IOPAD(0x002c, PIN_INPUT, 0) /* (C10) WKUP_UART0_CTSn */
|
||||
AM62DX_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (C8) WKUP_UART0_RTSn */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
/* WKUP UART0 is used for DM firmware logs */
|
||||
&wkup_uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wkup_uart0_pins_default>;
|
||||
bootph-all;
|
||||
status = "reserved";
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
main_uart0_pins_default: main-uart0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62DX_IOPAD(0x01c8, PIN_INPUT, 0) /* (E14) UART0_RXD */
|
||||
AM62DX_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_i2c0_pins_default: main-i2c0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62DX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D17) I2C0_SCL */
|
||||
AM62DX_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (E16) I2C0_SDA */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_i2c1_pins_default: main-i2c1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62DX_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C17) I2C1_SCL */
|
||||
AM62DX_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (E17) I2C1_SDA */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_i2c2_pins_default: main-i2c2-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62DX_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (M22) GPMC0_CSn2.I2C2_SCL */
|
||||
AM62DX_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (M20) GPMC0_CSn3.I2C2_SDA */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mmc0_pins_default: main-mmc0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62DX_IOPAD(0x0220, PIN_INPUT_PULLUP, 0) /* (Y6) MMC0_CMD */
|
||||
AM62DX_IOPAD(0x0218, PIN_OUTPUT, 0) /* (AB7) MMC0_CLK */
|
||||
AM62DX_IOPAD(0x0214, PIN_INPUT_PULLUP, 0) /* (AA6) MMC0_DAT0 */
|
||||
AM62DX_IOPAD(0x0210, PIN_INPUT_PULLUP, 0) /* (AB6) MMC0_DAT1 */
|
||||
AM62DX_IOPAD(0x020c, PIN_INPUT_PULLUP, 0) /* (Y7) MMC0_DAT2 */
|
||||
AM62DX_IOPAD(0x0208, PIN_INPUT_PULLUP, 0) /* (AA7) MMC0_DAT3 */
|
||||
AM62DX_IOPAD(0x0204, PIN_INPUT_PULLUP, 0) /* (Y8) MMC0_DAT4 */
|
||||
AM62DX_IOPAD(0x0200, PIN_INPUT_PULLUP, 0) /* (W7) MMC0_DAT5 */
|
||||
AM62DX_IOPAD(0x01fc, PIN_INPUT_PULLUP, 0) /* (W9) MMC0_DAT6 */
|
||||
AM62DX_IOPAD(0x01f8, PIN_INPUT_PULLUP, 0) /* (AB8) MMC0_DAT7 */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_mmc1_pins_default: main-mmc1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62DX_IOPAD(0x023c, PIN_INPUT, 0) /* (C21) MMC1_CMD */
|
||||
AM62DX_IOPAD(0x0234, PIN_OUTPUT, 0) /* (E22) MMC1_CLK */
|
||||
AM62DX_IOPAD(0x0230, PIN_INPUT, 0) /* (B22) MMC1_DAT0 */
|
||||
AM62DX_IOPAD(0x022c, PIN_INPUT, 0) /* (D21) MMC1_DAT1 */
|
||||
AM62DX_IOPAD(0x0228, PIN_INPUT, 0) /* (C22) MMC1_DAT2 */
|
||||
AM62DX_IOPAD(0x0224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */
|
||||
AM62DX_IOPAD(0x0240, PIN_INPUT, 0) /* (E18) MMC1_SDCD */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_mdio0_pins_default: main-mdio0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62DX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */
|
||||
AM62DX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_rgmii1_pins_default: main-rgmii1-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62DX_IOPAD(0x14c, PIN_INPUT, 0) /* (AB16) RGMII1_RD0 */
|
||||
AM62DX_IOPAD(0x150, PIN_INPUT, 0) /* (V15) RGMII1_RD1 */
|
||||
AM62DX_IOPAD(0x154, PIN_INPUT, 0) /* (W15) RGMII1_RD2 */
|
||||
AM62DX_IOPAD(0x158, PIN_INPUT, 0) /* (V14) RGMII1_RD3 */
|
||||
AM62DX_IOPAD(0x148, PIN_INPUT, 0) /* (AA16) RGMII1_RXC */
|
||||
AM62DX_IOPAD(0x144, PIN_INPUT, 0) /* (AA15) RGMII1_RX_CTL */
|
||||
AM62DX_IOPAD(0x134, PIN_INPUT, 0) /* (Y17) RGMII1_TD0 */
|
||||
AM62DX_IOPAD(0x138, PIN_INPUT, 0) /* (V16) RGMII1_TD1 */
|
||||
AM62DX_IOPAD(0x13c, PIN_INPUT, 0) /* (Y16) RGMII1_TD2 */
|
||||
AM62DX_IOPAD(0x140, PIN_INPUT, 0) /* (AA17) RGMII1_TD3 */
|
||||
AM62DX_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AB17) RGMII1_TXC */
|
||||
AM62DX_IOPAD(0x012c, PIN_OUTPUT, 0) /* (W16) RGMII1_TX_CTL */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_rgmii2_pins_default: main-rgmii2-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62DX_IOPAD(0x0184, PIN_INPUT, 0) /* (AA21) RGMII2_RD0 */
|
||||
AM62DX_IOPAD(0x0188, PIN_INPUT, 0) /* (Y20) RGMII2_RD1 */
|
||||
AM62DX_IOPAD(0x018c, PIN_INPUT, 0) /* (AB21) RGMII2_RD2 */
|
||||
AM62DX_IOPAD(0x0190, PIN_INPUT, 0) /* (AB20) RGMII2_RD3 */
|
||||
AM62DX_IOPAD(0x0180, PIN_INPUT, 0) /* (AA20) RGMII2_RXC */
|
||||
AM62DX_IOPAD(0x017c, PIN_INPUT, 0) /* (W18) RGMII2_RX_CTL */
|
||||
AM62DX_IOPAD(0x016c, PIN_INPUT, 0) /* (AA19) RGMII2_TD0 */
|
||||
AM62DX_IOPAD(0x0170, PIN_INPUT, 0) /* (Y18) RGMII2_TD1 */
|
||||
AM62DX_IOPAD(0x0174, PIN_INPUT, 0) /* (AA18) RGMII2_TD2 */
|
||||
AM62DX_IOPAD(0x0178, PIN_INPUT, 0) /* (W17) RGMII2_TD3 */
|
||||
AM62DX_IOPAD(0x0168, PIN_OUTPUT, 0) /* (AB19) RGMII2_TXC */
|
||||
AM62DX_IOPAD(0x0164, PIN_OUTPUT, 0) /* (Y19) RGMII2_TX_CTL */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62DX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C15) UART0_RTSn.GPIO1_23 */
|
||||
>;
|
||||
};
|
||||
|
||||
vddshv_sdio_pins_default: vddshv-sdio-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62DX_IOPAD(0x1f4, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO1_31 */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
usr_led_pins_default: usr-led-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62DX_IOPAD(0x0244, PIN_INPUT, 7) /* (D18) MMC1_SDWP.GPIO1_49 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&mcu_gpio0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c0_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
|
||||
typec_pd0: usb-power-controller@3f {
|
||||
compatible = "ti,tps6598x";
|
||||
reg = <0x3f>;
|
||||
|
||||
connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
self-powered;
|
||||
data-role = "dual";
|
||||
power-role = "sink";
|
||||
port {
|
||||
usb_con_hs: endpoint {
|
||||
remote-endpoint = <&usb0_hs_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
exp1: gpio@22 {
|
||||
compatible = "ti,tca6424";
|
||||
reg = <0x22>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-parent = <&main_gpio1>;
|
||||
interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
|
||||
bootph-all;
|
||||
|
||||
gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
|
||||
"","MMC1_SD_EN",
|
||||
"VPP_EN", "GPIO_DIX_RST",
|
||||
"IO_EXP_OPT_EN", "DIX_INT",
|
||||
"GPIO_eMMC_RSTn", "CPLD2_DONE",
|
||||
"CPLD2_INTN", "CPLD1_DONE",
|
||||
"CPLD1_INTN", "USB_TYPEA_OC_INDICATION",
|
||||
"PCM1_INT", "PCM2_INT",
|
||||
"GPIO_PCM1_RST", "TEST_GPIO2",
|
||||
"GPIO_PCM2_RST", "",
|
||||
"IO_MCAN0_STB", "IO_MCAN1_STB",
|
||||
"PD_I2C_IRQ", "IO_EXP_TEST_LED";
|
||||
};
|
||||
|
||||
exp2: gpio@20 {
|
||||
compatible = "ti,tca6416";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
gpio-line-names = "PCM6240_BUF_IO_EN", "",
|
||||
"CPLD1_JTAGENB", "CPLD1_PROGRAMN",
|
||||
"CPLD2_JTAGENB", "CPLD2_PROGRAMN",
|
||||
"", "",
|
||||
"", "CPLD1_TCK",
|
||||
"CPLD1_TMS", "CPLD1_TDI",
|
||||
"CPLD1_TDO", "CPLD2_TCK",
|
||||
"CPLD2_TMS", "CPLD2_TDI",
|
||||
"CPLD2_TDO", "ADDR1_IO_EXP",
|
||||
"SoC_I2C0_SCL", "SoC_I2C0_SDA";
|
||||
};
|
||||
};
|
||||
|
||||
&main_i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c1_pins_default>;
|
||||
clock-frequency = <100000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c2_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci0 {
|
||||
/* eMMC */
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc0_pins_default>;
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci1 {
|
||||
/* SD/MMC */
|
||||
vmmc-supply = <&vdd_mmc1>;
|
||||
vqmmc-supply = <&vddshv_sdio>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc1_pins_default>;
|
||||
disable-wp;
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_gpio1 {
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_gpio_intr {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&main_uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_uart0_pins_default>;
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
usb-role-switch;
|
||||
|
||||
port {
|
||||
usb0_hs_ep: endpoint {
|
||||
remote-endpoint = <&usb_con_hs>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cpsw3g {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_rgmii1_pins_default>,
|
||||
<&main_rgmii2_pins_default>;
|
||||
status = "okay";
|
||||
|
||||
cpts@3d000 {
|
||||
/* MAP HW3_TS_PUSH to GENF1 */
|
||||
ti,pps = <2 1>;
|
||||
};
|
||||
};
|
||||
|
||||
&cpsw_port1 {
|
||||
phy-mode = "rgmii-id";
|
||||
phy-handle = <&cpsw3g_phy0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpsw_port2 {
|
||||
phy-mode = "rgmii-id";
|
||||
phy-handle = <&cpsw3g_phy1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpsw3g_mdio {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mdio0_pins_default>;
|
||||
status = "okay";
|
||||
|
||||
cpsw3g_phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
ti,min-output-impedance;
|
||||
};
|
||||
|
||||
cpsw3g_phy1: ethernet-phy@3 {
|
||||
reg = <3>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
ti,min-output-impedance;
|
||||
};
|
||||
};
|
||||
|
||||
&mailbox0_cluster0 {
|
||||
status = "okay";
|
||||
|
||||
mbox_r5_0: mbox-r5-0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&mailbox0_cluster1 {
|
||||
status = "okay";
|
||||
|
||||
mbox_c7x_0: mbox-c7x-0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&mailbox0_cluster2 {
|
||||
status = "okay";
|
||||
|
||||
mbox_mcu_r5_0: mbox-mcu-r5-0 {
|
||||
ti,mbox-rx = <0 0 0>;
|
||||
ti,mbox-tx = <1 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
&wkup_r5fss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wkup_r5fss0_core0 {
|
||||
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
|
||||
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
|
||||
<&wkup_r5fss0_core0_memory_region>;
|
||||
bootph-pre-ram;
|
||||
};
|
||||
|
||||
&mcu_r5fss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcu_r5fss0_core0 {
|
||||
mboxes = <&mailbox0_cluster2 &mbox_mcu_r5_0>;
|
||||
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
|
||||
<&mcu_r5fss0_core0_memory_region>;
|
||||
firmware-name = "am62d-mcu-r5f0_0-fw";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&c7x_0 {
|
||||
mboxes = <&mailbox0_cluster1 &mbox_c7x_0>;
|
||||
memory-region = <&c7x_0_dma_memory_region>,
|
||||
<&c7x_0_memory_region>;
|
||||
firmware-name = "am62d-c71_0-fw";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* main_rti4 is used by C7x DSP */
|
||||
&main_rti4 {
|
||||
status = "reserved";
|
||||
};
|
||||
20
arch/arm64/boot/dts/ti/k3-am62d2.dtsi
Normal file
20
arch/arm64/boot/dts/ti/k3-am62d2.dtsi
Normal file
|
|
@ -0,0 +1,20 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only OR MIT
|
||||
/*
|
||||
* Device Tree Source for AM62D2 SoC family in Quad core configuration
|
||||
*
|
||||
* TRM: https://www.ti.com/lit/pdf/sprujd4
|
||||
*
|
||||
* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "k3-am62a7.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Texas Instruments K3 AM62D SoC";
|
||||
compatible = "ti,am62d2";
|
||||
};
|
||||
|
||||
/delete-node/ &vpu; /* Video Codec is disabled in AM62D2 SoC */
|
||||
/delete-node/ &e5010; /* JPEG Encoder is disabled in AM62D2 SoC */
|
||||
|
|
@ -259,7 +259,7 @@
|
|||
|
||||
main_pmx0: pinctrl@f4000 {
|
||||
compatible = "pinctrl-single";
|
||||
reg = <0x00 0xf4000 0x00 0x2ac>;
|
||||
reg = <0x00 0xf4000 0x00 0x2b0>;
|
||||
#pinctrl-cells = <1>;
|
||||
pinctrl-single,register-width = <32>;
|
||||
pinctrl-single,function-mask = <0xffffffff>;
|
||||
|
|
|
|||
|
|
@ -12,12 +12,29 @@ thermal_zones: thermal-zones {
|
|||
thermal-sensors = <&wkup_vtm0 0>;
|
||||
|
||||
trips {
|
||||
main0_alert: main0-alert {
|
||||
temperature = <115000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
main0_crit: main0-crit {
|
||||
temperature = <125000>; /* milliCelsius */
|
||||
hysteresis = <2000>; /* milliCelsius */
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&main0_alert>;
|
||||
cooling-device =
|
||||
<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
main1_thermal: main1-thermal {
|
||||
|
|
@ -26,12 +43,29 @@ thermal_zones: thermal-zones {
|
|||
thermal-sensors = <&wkup_vtm0 1>;
|
||||
|
||||
trips {
|
||||
main1_alert: main1-alert {
|
||||
temperature = <115000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
main1_crit: main1-crit {
|
||||
temperature = <125000>; /* milliCelsius */
|
||||
hysteresis = <2000>; /* milliCelsius */
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&main1_alert>;
|
||||
cooling-device =
|
||||
<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
main2_thermal: main2-thermal {
|
||||
|
|
@ -40,11 +74,28 @@ thermal_zones: thermal-zones {
|
|||
thermal-sensors = <&wkup_vtm0 2>;
|
||||
|
||||
trips {
|
||||
main2_alert: main2-alert {
|
||||
temperature = <115000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
main2_crit: main2-crit {
|
||||
temperature = <125000>; /* milliCelsius */
|
||||
hysteresis = <2000>; /* milliCelsius */
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&main2_alert>;
|
||||
cooling-device =
|
||||
<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -426,14 +426,14 @@
|
|||
/* Verdin PWM_3_DSI as GPIO */
|
||||
pinctrl_pwm3_dsi_gpio: main-gpio1-16-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62PX_IOPAD(0x01b8, PIN_OUTPUT, 7) /* (E20) SPI0_CS1.GPIO1_16 */ /* SODIMM 19 */
|
||||
AM62PX_IOPAD(0x01b8, PIN_INPUT, 7) /* (E20) SPI0_CS1.GPIO1_16 */ /* SODIMM 19 */
|
||||
>;
|
||||
};
|
||||
|
||||
/* Verdin SD_1_CD# */
|
||||
pinctrl_sd1_cd: main-gpio1-48-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62PX_IOPAD(0x0240, PIN_INPUT, 7) /* (D23) MMC1_SDCD.GPIO1_48 */ /* SODIMM 84 */
|
||||
AM62PX_IOPAD(0x0240, PIN_INPUT_PULLUP, 7) /* (D23) MMC1_SDCD.GPIO1_48 */ /* SODIMM 84 */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
@ -717,8 +717,8 @@
|
|||
/* Verdin I2C_3_HDMI */
|
||||
pinctrl_mcu_i2c0: mcu-i2c0-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM62PX_MCU_IOPAD(0x0044, PIN_INPUT, 0) /* (E11) MCU_I2C0_SCL */ /* SODIMM 59 */
|
||||
AM62PX_MCU_IOPAD(0x0048, PIN_INPUT, 0) /* (D11) MCU_I2C0_SDA */ /* SODIMM 57 */
|
||||
AM62PX_MCU_IOPAD(0x0044, PIN_INPUT_PULLUP, 0) /* (E11) MCU_I2C0_SCL */ /* SODIMM 59 */
|
||||
AM62PX_MCU_IOPAD(0x0048, PIN_INPUT_PULLUP, 0) /* (D11) MCU_I2C0_SDA */ /* SODIMM 57 */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
@ -848,6 +848,30 @@
|
|||
};
|
||||
};
|
||||
|
||||
&main0_alert {
|
||||
temperature = <95000>;
|
||||
};
|
||||
|
||||
&main0_crit {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
&main1_alert {
|
||||
temperature = <95000>;
|
||||
};
|
||||
|
||||
&main1_crit {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
&main2_alert {
|
||||
temperature = <95000>;
|
||||
};
|
||||
|
||||
&main2_crit {
|
||||
temperature = <105000>;
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
gpio-line-names =
|
||||
"SODIMM_52",
|
||||
|
|
|
|||
|
|
@ -214,6 +214,14 @@
|
|||
};
|
||||
};
|
||||
|
||||
&cpsw_mac_syscon {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&phy_gmii_sel {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
bootph-all;
|
||||
};
|
||||
|
|
@ -267,6 +275,7 @@
|
|||
AM62PX_IOPAD(0x0160, PIN_OUTPUT, 0) /* (F17) MDIO0_MDC */
|
||||
AM62PX_IOPAD(0x015c, PIN_INPUT, 0) /* (F16) MDIO0_MDIO */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_mmc1_pins_default: main-mmc1-default-pins {
|
||||
|
|
@ -547,6 +556,7 @@
|
|||
phy-mode = "rgmii-rxid";
|
||||
phy-handle = <&cpsw3g_phy0>;
|
||||
status = "okay";
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&cpsw_port2 {
|
||||
|
|
@ -562,6 +572,7 @@
|
|||
|
||||
cpsw3g_phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
bootph-all;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
ti,min-output-impedance;
|
||||
|
|
|
|||
|
|
@ -49,6 +49,7 @@
|
|||
next-level-cache = <&l2_0>;
|
||||
operating-points-v2 = <&a53_opp_table>;
|
||||
clocks = <&k3_clks 135 0>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
|
|
@ -65,6 +66,7 @@
|
|||
next-level-cache = <&l2_0>;
|
||||
operating-points-v2 = <&a53_opp_table>;
|
||||
clocks = <&k3_clks 136 0>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
cpu2: cpu@2 {
|
||||
|
|
@ -81,6 +83,7 @@
|
|||
next-level-cache = <&l2_0>;
|
||||
operating-points-v2 = <&a53_opp_table>;
|
||||
clocks = <&k3_clks 137 0>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
cpu3: cpu@3 {
|
||||
|
|
@ -97,6 +100,7 @@
|
|||
next-level-cache = <&l2_0>;
|
||||
operating-points-v2 = <&a53_opp_table>;
|
||||
clocks = <&k3_clks 138 0>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -203,22 +203,6 @@
|
|||
>;
|
||||
};
|
||||
|
||||
main_mmc0_pins_default: main-mmc0-default-pins {
|
||||
bootph-all;
|
||||
pinctrl-single,pins = <
|
||||
AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3/V3) MMC0_CMD */
|
||||
AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1/Y1) MMC0_CLK */
|
||||
AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2/V2) MMC0_DAT0 */
|
||||
AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1/V1) MMC0_DAT1 */
|
||||
AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3/W2) MMC0_DAT2 */
|
||||
AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4/W1) MMC0_DAT3 */
|
||||
AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2/Y2) MMC0_DAT4 */
|
||||
AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1/W3) MMC0_DAT5 */
|
||||
AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2/W4) MMC0_DAT6 */
|
||||
AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2/V4) MMC0_DAT7 */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mmc1_pins_default: main-mmc1-default-pins {
|
||||
bootph-all;
|
||||
pinctrl-single,pins = <
|
||||
|
|
@ -457,14 +441,6 @@
|
|||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&sdhci0 {
|
||||
bootph-all;
|
||||
status = "okay";
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc0_pins_default>;
|
||||
};
|
||||
|
||||
&sdhci1 {
|
||||
/* SD/MMC */
|
||||
bootph-all;
|
||||
|
|
|
|||
|
|
@ -46,6 +46,7 @@
|
|||
max-functions = /bits/ 8 <1>;
|
||||
phys = <&serdes0_pcie_link>;
|
||||
phy-names = "pcie-phy";
|
||||
bootph-all;
|
||||
ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x0>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -322,6 +322,8 @@
|
|||
&icssg0_mdio {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&icssg0_mdio_pins_default &clkout0_pins_default>;
|
||||
assigned-clocks = <&k3_clks 157 123>;
|
||||
assigned-clock-parents = <&k3_clks 157 125>;
|
||||
status = "okay";
|
||||
|
||||
icssg0_phy1: ethernet-phy@1 {
|
||||
|
|
|
|||
|
|
@ -655,6 +655,7 @@
|
|||
<0x00 0x32800000 0x00 0x100000>;
|
||||
interrupt-names = "rx_011";
|
||||
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
hwspinlock: spinlock@30e00000 {
|
||||
|
|
|
|||
|
|
@ -21,16 +21,19 @@
|
|||
k3_pds: power-controller {
|
||||
compatible = "ti,sci-pm-domain";
|
||||
#power-domain-cells = <2>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
k3_clks: clock-controller {
|
||||
compatible = "ti,k2g-sci-clk";
|
||||
#clock-cells = <2>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
k3_reset: reset-controller {
|
||||
compatible = "ti,sci-reset";
|
||||
#reset-cells = <2>;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -43,6 +46,7 @@
|
|||
chipid: chipid@14 {
|
||||
compatible = "ti,am654-chipid";
|
||||
reg = <0x14 0x4>;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -107,5 +111,6 @@
|
|||
reg = <0x42050000 0x25c>;
|
||||
power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
|
||||
#thermal-sensor-cells = <1>;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -144,6 +144,7 @@
|
|||
regulator-boot-on;
|
||||
vin-supply = <&vcc3v3_io>;
|
||||
gpio = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>;
|
||||
bootph-all;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -155,12 +156,14 @@
|
|||
AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1) /* (AC2) WKUP_GPIO0_6.WKUP_UART0_CTSn */
|
||||
AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1) /* (AC1) WKUP_GPIO0_7.WKUP_UART0_RTSn */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
ddr_vtt_pins_default: ddr-vtt-default-pins {
|
||||
pinctrl-single,pins = <
|
||||
AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7) /* WKUP_GPIO0_28 */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
wkup_i2c0_pins_default: wkup-i2c0-default-pins {
|
||||
|
|
@ -168,6 +171,7 @@
|
|||
AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */
|
||||
AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
push_button_pins_default: push-button-default-pins {
|
||||
|
|
@ -191,6 +195,7 @@
|
|||
AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */
|
||||
AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
wkup_pca554_default: wkup-pca554-default-pins {
|
||||
|
|
@ -206,6 +211,7 @@
|
|||
AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) /* (P1) MCU_OSPI1_D3.MCU_UART0_CTSn */
|
||||
AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) /* (N3) MCU_OSPI1_CSn1.MCU_UART0_RTSn */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
mcu_cpsw_pins_default: mcu-cpsw-default-pins {
|
||||
|
|
@ -248,6 +254,7 @@
|
|||
AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11) UART0_CTSn */
|
||||
AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_i2c2_pins_default: main-i2c2-default-pins {
|
||||
|
|
@ -281,6 +288,7 @@
|
|||
AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
|
||||
AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_mmc1_pins_default: main-mmc1-default-pins {
|
||||
|
|
@ -294,6 +302,7 @@
|
|||
AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
|
||||
AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
usb1_pins_default: usb1-default-pins {
|
||||
|
|
@ -343,6 +352,7 @@
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_uart0_pins_default>;
|
||||
power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&wkup_i2c0 {
|
||||
|
|
@ -368,6 +378,7 @@
|
|||
ti,vsel0-state-high;
|
||||
ti,vsel1-state-high;
|
||||
ti,enable-vout-discharge;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
gpio@38 {
|
||||
|
|
@ -456,6 +467,7 @@
|
|||
bus-width = <8>;
|
||||
non-removable;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -470,6 +482,7 @@
|
|||
pinctrl-0 = <&main_mmc1_pins_default>;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
disable-wp;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
|
|
@ -630,3 +643,7 @@
|
|||
&dss {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&wkup_gpio0 {
|
||||
bootph-all;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -46,6 +46,7 @@
|
|||
|
||||
&dwc3_0 {
|
||||
status = "okay";
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&usb0_phy {
|
||||
|
|
|
|||
|
|
@ -45,6 +45,7 @@
|
|||
<&k3_clks 151 8>; /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */
|
||||
phys = <&serdes0 PHY_TYPE_USB3 0>;
|
||||
phy-names = "usb3-phy";
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
|
|
|
|||
|
|
@ -344,6 +344,7 @@
|
|||
J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
|
||||
J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
mcu_mdio_pins_default: mcu-mdio-default-pins {
|
||||
|
|
@ -351,6 +352,7 @@
|
|||
J721S2_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */
|
||||
J721S2_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
mcu_mcan0_pins_default: mcu-mcan0-default-pins {
|
||||
|
|
@ -412,6 +414,14 @@
|
|||
};
|
||||
};
|
||||
|
||||
&cpsw_mac_syscon {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&phy_gmii_sel {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_gpio0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -626,6 +636,7 @@
|
|||
&davinci_mdio {
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
bootph-all;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
ti,min-output-impedance;
|
||||
|
|
@ -635,6 +646,7 @@
|
|||
&cpsw_port1 {
|
||||
phy-mode = "rgmii-rxid";
|
||||
phy-handle = <&phy0>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&mcu_mcan0 {
|
||||
|
|
|
|||
|
|
@ -568,6 +568,7 @@
|
|||
J784S4_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */
|
||||
J784S4_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
mcu_mdio_pins_default: mcu-mdio-default-pins {
|
||||
|
|
@ -575,6 +576,7 @@
|
|||
J784S4_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */
|
||||
J784S4_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
mcu_rpi_hdr1_gpio0_pins_default: mcu-rpi-hdr1-gpio0-default-pins {
|
||||
|
|
@ -630,6 +632,14 @@
|
|||
};
|
||||
};
|
||||
|
||||
&cpsw_mac_syscon {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&phy_gmii_sel {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&mailbox0_cluster0 {
|
||||
status = "okay";
|
||||
interrupts = <436>;
|
||||
|
|
@ -968,6 +978,7 @@
|
|||
&davinci_mdio {
|
||||
mcu_phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
bootph-all;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
ti,min-output-impedance;
|
||||
|
|
@ -978,6 +989,7 @@
|
|||
status = "okay";
|
||||
phy-mode = "rgmii-rxid";
|
||||
phy-handle = <&mcu_phy0>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&mcu_r5fss0_core0 {
|
||||
|
|
@ -1294,8 +1306,12 @@
|
|||
&serdes_ln_ctrl {
|
||||
idle-states = <J784S4_SERDES0_LANE0_PCIE1_LANE0>, <J784S4_SERDES0_LANE1_PCIE1_LANE1>,
|
||||
<J784S4_SERDES0_LANE2_PCIE3_LANE0>, <J784S4_SERDES0_LANE3_USB>,
|
||||
<J784S4_SERDES1_LANE0_PCIE0_LANE0>, <J784S4_SERDES1_LANE1_PCIE0_LANE1>,
|
||||
<J784S4_SERDES1_LANE2_PCIE0_LANE2>, <J784S4_SERDES1_LANE3_PCIE0_LANE3>;
|
||||
<J784S4_SERDES1_LANE0_PCIE0_LANE0>, <J784S4_SERDES1_LANE1_PCIE0_LANE1>,
|
||||
<J784S4_SERDES1_LANE2_PCIE0_LANE2>, <J784S4_SERDES1_LANE3_PCIE0_LANE3>,
|
||||
<J784S4_SERDES2_LANE0_IP2_UNUSED>, <J784S4_SERDES2_LANE1_IP2_UNUSED>,
|
||||
<J784S4_SERDES2_LANE2_QSGMII_LANE1>, <J784S4_SERDES2_LANE3_QSGMII_LANE2>,
|
||||
<J784S4_SERDES4_LANE0_EDP_LANE0>, <J784S4_SERDES4_LANE1_EDP_LANE1>,
|
||||
<J784S4_SERDES4_LANE2_EDP_LANE2>, <J784S4_SERDES4_LANE3_EDP_LANE3>;
|
||||
};
|
||||
|
||||
&serdes_wiz0 {
|
||||
|
|
|
|||
|
|
@ -2067,4 +2067,94 @@
|
|||
power-domain-names = "a", "b";
|
||||
dma-coherent;
|
||||
};
|
||||
|
||||
mcasp0: mcasp@2b00000 {
|
||||
compatible = "ti,am33xx-mcasp-audio";
|
||||
reg = <0x00 0x02b00000 0x00 0x2000>,
|
||||
<0x00 0x02b08000 0x00 0x1000>;
|
||||
reg-names = "mpu","dat";
|
||||
interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 545 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "tx", "rx";
|
||||
dmas = <&main_udmap 0xc400>, <&main_udmap 0x4400>;
|
||||
dma-names = "tx", "rx";
|
||||
clocks = <&k3_clks 209 0>;
|
||||
clock-names = "fck";
|
||||
assigned-clocks = <&k3_clks 209 0>;
|
||||
assigned-clock-parents = <&k3_clks 209 1>;
|
||||
power-domains = <&k3_pds 209 TI_SCI_PD_EXCLUSIVE>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcasp1: mcasp@2b10000 {
|
||||
compatible = "ti,am33xx-mcasp-audio";
|
||||
reg = <0x00 0x02b10000 0x00 0x2000>,
|
||||
<0x00 0x02b18000 0x00 0x1000>;
|
||||
reg-names = "mpu","dat";
|
||||
interrupts = <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 547 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "tx", "rx";
|
||||
dmas = <&main_udmap 0xc401>, <&main_udmap 0x4401>;
|
||||
dma-names = "tx", "rx";
|
||||
clocks = <&k3_clks 210 0>;
|
||||
clock-names = "fck";
|
||||
assigned-clocks = <&k3_clks 210 0>;
|
||||
assigned-clock-parents = <&k3_clks 210 1>;
|
||||
power-domains = <&k3_pds 210 TI_SCI_PD_EXCLUSIVE>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcasp2: mcasp@2b20000 {
|
||||
compatible = "ti,am33xx-mcasp-audio";
|
||||
reg = <0x00 0x02b20000 0x00 0x2000>,
|
||||
<0x00 0x02b28000 0x00 0x1000>;
|
||||
reg-names = "mpu","dat";
|
||||
interrupts = <GIC_SPI 548 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 549 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "tx", "rx";
|
||||
dmas = <&main_udmap 0xc402>, <&main_udmap 0x4402>;
|
||||
dma-names = "tx", "rx";
|
||||
clocks = <&k3_clks 211 0>;
|
||||
clock-names = "fck";
|
||||
assigned-clocks = <&k3_clks 211 0>;
|
||||
assigned-clock-parents = <&k3_clks 211 1>;
|
||||
power-domains = <&k3_pds 211 TI_SCI_PD_EXCLUSIVE>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcasp3: mcasp@2b30000 {
|
||||
compatible = "ti,am33xx-mcasp-audio";
|
||||
reg = <0x00 0x02b30000 0x00 0x2000>,
|
||||
<0x00 0x02b38000 0x00 0x1000>;
|
||||
reg-names = "mpu","dat";
|
||||
interrupts = <GIC_SPI 550 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "tx", "rx";
|
||||
dmas = <&main_udmap 0xc403>, <&main_udmap 0x4403>;
|
||||
dma-names = "tx", "rx";
|
||||
clocks = <&k3_clks 212 0>;
|
||||
clock-names = "fck";
|
||||
assigned-clocks = <&k3_clks 212 0>;
|
||||
assigned-clock-parents = <&k3_clks 212 1>;
|
||||
power-domains = <&k3_pds 212 TI_SCI_PD_EXCLUSIVE>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcasp4: mcasp@2b40000 {
|
||||
compatible = "ti,am33xx-mcasp-audio";
|
||||
reg = <0x00 0x02b40000 0x00 0x2000>,
|
||||
<0x00 0x02b48000 0x00 0x1000>;
|
||||
reg-names = "mpu","dat";
|
||||
interrupts = <GIC_SPI 552 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 553 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "tx", "rx";
|
||||
dmas = <&main_udmap 0xc404>, <&main_udmap 0x4404>;
|
||||
dma-names = "tx", "rx";
|
||||
clocks = <&k3_clks 213 0>;
|
||||
clock-names = "fck";
|
||||
assigned-clocks = <&k3_clks 213 0>;
|
||||
assigned-clock-parents = <&k3_clks 213 1>;
|
||||
power-domains = <&k3_pds 213 TI_SCI_PD_EXCLUSIVE>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -282,6 +282,14 @@
|
|||
};
|
||||
};
|
||||
|
||||
&cpsw_mac_syscon {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&phy_gmii_sel {
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
|
||||
main_mcan0_pins_default: main-mcan0-default-pins {
|
||||
|
|
@ -346,6 +354,7 @@
|
|||
J722S_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */
|
||||
J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
ospi0_pins_default: ospi0-default-pins {
|
||||
|
|
@ -380,6 +389,7 @@
|
|||
J722S_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */
|
||||
J722S_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */
|
||||
>;
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
main_usb1_pins_default: main-usb1-default-pins {
|
||||
|
|
@ -424,6 +434,7 @@
|
|||
|
||||
cpsw3g_phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
bootph-all;
|
||||
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
|
||||
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||
ti,min-output-impedance;
|
||||
|
|
@ -434,6 +445,7 @@
|
|||
phy-mode = "rgmii-rxid";
|
||||
phy-handle = <&cpsw3g_phy0>;
|
||||
status = "okay";
|
||||
bootph-all;
|
||||
};
|
||||
|
||||
&main_gpio1 {
|
||||
|
|
@ -634,7 +646,7 @@
|
|||
/* P05 - USB2.0_MUX_SEL */
|
||||
gpio-hog;
|
||||
gpios = <5 GPIO_ACTIVE_LOW>;
|
||||
output-high;
|
||||
output-low;
|
||||
};
|
||||
|
||||
p01_hog: p01-hog {
|
||||
|
|
|
|||
|
|
@ -418,6 +418,15 @@
|
|||
<0x10 0x3>; /* SERDES1 lane0 select */
|
||||
};
|
||||
|
||||
audio_refclk0: clock@82e0 {
|
||||
compatible = "ti,am62-audio-refclk";
|
||||
reg = <0x82e0 0x4>;
|
||||
clocks = <&k3_clks 157 0>;
|
||||
assigned-clocks = <&k3_clks 157 0>;
|
||||
assigned-clock-parents = <&k3_clks 157 15>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
audio_refclk1: clock@82e4 {
|
||||
compatible = "ti,am62-audio-refclk";
|
||||
reg = <0x82e4 0x4>;
|
||||
|
|
|
|||
|
|
@ -56,6 +56,7 @@
|
|||
d-cache-sets = <128>;
|
||||
next-level-cache = <&l2_0>;
|
||||
clocks = <&k3_clks 135 0>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
|
|
@ -71,6 +72,7 @@
|
|||
d-cache-sets = <128>;
|
||||
next-level-cache = <&l2_0>;
|
||||
clocks = <&k3_clks 136 0>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
cpu2: cpu@2 {
|
||||
|
|
@ -86,6 +88,7 @@
|
|||
d-cache-sets = <128>;
|
||||
next-level-cache = <&l2_0>;
|
||||
clocks = <&k3_clks 137 0>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
cpu3: cpu@3 {
|
||||
|
|
@ -101,6 +104,7 @@
|
|||
d-cache-sets = <128>;
|
||||
next-level-cache = <&l2_0>;
|
||||
clocks = <&k3_clks 138 0>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -131,6 +131,11 @@
|
|||
compatible = "ti,j784s4-acspcie-proxy-ctrl", "syscon";
|
||||
reg = <0x1a090 0x4>;
|
||||
};
|
||||
|
||||
acspcie1_proxy_ctrl: clock-controller@1a094 {
|
||||
compatible = "ti,j784s4-acspcie-proxy-ctrl", "syscon";
|
||||
reg = <0x1a094 0x4>;
|
||||
};
|
||||
};
|
||||
|
||||
main_ehrpwm0: pwm@3000000 {
|
||||
|
|
@ -2675,4 +2680,15 @@
|
|||
power-domains = <&k3_pds 269 TI_SCI_PD_EXCLUSIVE>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
bist_main14: bist@33c0000 {
|
||||
compatible = "ti,j784s4-bist";
|
||||
reg = <0x00 0x033c0000 0x00 0x400>,
|
||||
<0x00 0x0010c1a0 0x00 0x01c>;
|
||||
reg-names = "cfg", "ctrl_mmr";
|
||||
clocks = <&k3_clks 237 7>;
|
||||
power-domains = <&k3_pds 237 TI_SCI_PD_EXCLUSIVE>;
|
||||
bootph-pre-ram;
|
||||
ti,sci-dev-id = <234>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -8,6 +8,7 @@
|
|||
#ifndef DTS_ARM64_TI_K3_PINCTRL_H
|
||||
#define DTS_ARM64_TI_K3_PINCTRL_H
|
||||
|
||||
#define ST_EN_SHIFT (14)
|
||||
#define PULLUDEN_SHIFT (16)
|
||||
#define PULLTYPESEL_SHIFT (17)
|
||||
#define RXACTIVE_SHIFT (18)
|
||||
|
|
@ -19,6 +20,10 @@
|
|||
#define DS_PULLUD_EN_SHIFT (27)
|
||||
#define DS_PULLTYPE_SEL_SHIFT (28)
|
||||
|
||||
/* Schmitt trigger configuration */
|
||||
#define ST_DISABLE (0 << ST_EN_SHIFT)
|
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#define ST_ENABLE (1 << ST_EN_SHIFT)
|
||||
|
||||
#define PULL_DISABLE (1 << PULLUDEN_SHIFT)
|
||||
#define PULL_ENABLE (0 << PULLUDEN_SHIFT)
|
||||
|
||||
|
|
@ -32,9 +37,13 @@
|
|||
#define PIN_OUTPUT (INPUT_DISABLE | PULL_DISABLE)
|
||||
#define PIN_OUTPUT_PULLUP (INPUT_DISABLE | PULL_UP)
|
||||
#define PIN_OUTPUT_PULLDOWN (INPUT_DISABLE | PULL_DOWN)
|
||||
#define PIN_INPUT (INPUT_EN | PULL_DISABLE)
|
||||
#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP)
|
||||
#define PIN_INPUT_PULLDOWN (INPUT_EN | PULL_DOWN)
|
||||
#define PIN_INPUT (INPUT_EN | ST_ENABLE | PULL_DISABLE)
|
||||
#define PIN_INPUT_PULLUP (INPUT_EN | ST_ENABLE | PULL_UP)
|
||||
#define PIN_INPUT_PULLDOWN (INPUT_EN | ST_ENABLE | PULL_DOWN)
|
||||
/* Input configurations with Schmitt Trigger disabled */
|
||||
#define PIN_INPUT_NOST (INPUT_EN | PULL_DISABLE)
|
||||
#define PIN_INPUT_PULLUP_NOST (INPUT_EN | PULL_UP)
|
||||
#define PIN_INPUT_PULLDOWN_NOST (INPUT_EN | PULL_DOWN)
|
||||
|
||||
#define PIN_DEBOUNCE_DISABLE (0 << DEBOUNCE_SHIFT)
|
||||
#define PIN_DEBOUNCE_CONF1 (1 << DEBOUNCE_SHIFT)
|
||||
|
|
@ -63,6 +72,9 @@
|
|||
#define AM62AX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
#define AM62AX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
|
||||
#define AM62DX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
#define AM62DX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
|
||||
#define AM62PX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
#define AM62PX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue