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ARM: dts: imx6-tx6: remove container node around pinctrl nodes

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Remove the function node around the pinctrl nodes that was obsoleted
by commit 5fcdf6a7ed ("pinctrl: imx: Allow parsing DT without
function nodes"), we can save this container node.

Also move the iomux node to the bottom of the file to improve
readability of the file.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Lothar Waßmann 2016-03-08 09:04:01 +01:00 • committed by Shawn Guo
parent 0fd646d0e7
commit c4aca663ae
5 changed files with 321 additions and 326 deletions
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18
arch/arm/boot/dts/imx6dl-tx6u-811x.dts
View file

@ -111,16 +111,6 @@
};
};
&iomuxc {
imx6dl-tx6u-811x {
pinctrl_eeti: eetigrp {
fsl,pins = <
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b1 /* Interrupt */
>;
};
};
};
&kpp {
status = "disabled"; /* pad conflict with backlight1 PWM */
};
@ -178,3 +168,11 @@
&pwm1 {
status = "okay";
};
&iomuxc {
pinctrl_eeti: eetigrp {
fsl,pins = <
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b1 /* Interrupt */
>;
};
};

30
arch/arm/boot/dts/imx6q-tx6q-1020-comtft.dts
View file

@ -124,22 +124,6 @@
status = "disabled";
};
&iomuxc {
imx6qdl-tx6 {
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x070b1
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x070b1
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x070b1
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x070b1
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x070b1
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x070b1
MX6QDL_PAD_NANDF_ALE__SD4_RESET 0x0b0b1
>;
};
};
};
&ipu1_di0_disp0 {
remote-endpoint = <&display0_in>;
};
@ -164,3 +148,17 @@
fsl,wp-controller;
status = "okay";
};
&iomuxc {
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x070b1
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x070b1
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x070b1
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x070b1
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x070b1
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x070b1
MX6QDL_PAD_NANDF_ALE__SD4_RESET 0x0b0b1
>;
};
};

30
arch/arm/boot/dts/imx6q-tx6q-1020.dts
View file

@ -210,22 +210,6 @@
status = "disabled";
};
&iomuxc {
imx6qdl-tx6 {
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x070b1
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x070b1
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x070b1
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x070b1
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x070b1
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x070b1
MX6QDL_PAD_NANDF_ALE__SD4_RESET 0x0b0b1
>;
};
};
};
&ipu1_di0_disp0 {
remote-endpoint = <&display0_in>;
};
@ -238,3 +222,17 @@
fsl,wp-controller;
status = "okay";
};
&iomuxc {
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x070b1
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x070b1
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x070b1
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x070b1
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x070b1
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x070b1
MX6QDL_PAD_NANDF_ALE__SD4_RESET 0x0b0b1
>;
};
};

18
arch/arm/boot/dts/imx6q-tx6q-1110.dts
View file

@ -111,16 +111,6 @@
};
};
&iomuxc {
imx6q-tx6q-1110 {
pinctrl_eeti: eetigrp {
fsl,pins = <
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b1 /* Interrupt */
>;
};
};
};
&kpp {
status = "disabled"; /* pad conflict with backlight1 PWM */
};
@ -182,3 +172,11 @@
&sata {
status = "okay";
};
&iomuxc {
pinctrl_eeti: eetigrp {
fsl,pins = <
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b1 /* Interrupt */
>;
};
};

13
arch/arm/boot/dts/imx6qdl-tx6.dtsi
View file

@ -332,7 +332,6 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
imx6qdl-tx6 {
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b1 /* LED */
@ -438,8 +437,6 @@
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
@ -450,6 +447,13 @@
>;
};
pinctrl_enet_mdio: enet-mdiogrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
>;
};
pinctrl_etnphy_power: etnphy-pwrgrp {
fsl,pins = <
MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1 /* ETN PHY POWER */
@ -529,7 +533,7 @@
>;
};
pinctrl_lcd1_pwr: lcd1-pwrgrp {
pinctrl_lcd1_pwr: lcd-pwrgrp {
fsl,pins = <
MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b1 /* LCD Power Enable */
>;
@ -636,7 +640,6 @@
MX6QDL_PAD_SD3_CLK__GPIO7_IO03 0x170b0 /* SD2 CD */
>;
};
};
};
&kpp {