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riscv: dts: allwinner: convert isa detection to new properties

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Convert the D1 devicetrees to use the new properties
"riscv,isa-base" & "riscv,isa-extensions".
For compatibility with other projects, "riscv,isa" remains.

Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231009-moonlight-gray-92debdc89f30@wendy
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
This commit is contained in:
Conor Dooley 2023-10-09 10:37:49 +01:00 • committed by Jernej Skrabec
parent 61ebaa041f
commit c3f7c14856
1 changed files with 3 additions and 0 deletions
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3
arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
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@ -25,6 +25,9 @@
mmu-type = "riscv,sv39";
operating-points-v2 = <&opp_table_cpu>;
riscv,isa = "rv64imafdc";
riscv,isa-base = "rv64i";
riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr",
"zifencei", "zihpm";
#cooling-cells = <2>;
cpu0_intc: interrupt-controller {